Reference health
Face classification using electronic synapses
32/32 checkable references clean · checked 2026-07-23
Every reference with a DOI in the deposited reference list resolved to a known work in Crossref or DataCite at the dated check, and none carried a retraction, withdrawal, or removal notice.
7 without a DOI — not checked. A reference deposited without a DOI is never matched by title or guessed at; it stays outside the checked set, and this line discloses that.
The 32 checked references that resolve
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A million spiking-neuron integrated circuit with a scalable communication network and interface
resolves10.1109/JPROC.2014.2313565
Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations
resolves10.1109/TNN.2006.883007
Dynamically Reconfigurable Silicon Array of Spiking Neurons With Conductance-Based Synapses
resolves10.1109/IJCNN.2008.4634199
SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor
resolves10.1109/IEDM.2015.7409622
Device and system level design considerations for analog-non-volatile-memory based neuromorphic architectures
resolves10.1038/nature14441
Training and operation of an integrated neuromorphic network based on metal-oxide memristors
resolves10.1109/TED.2015.2439635
Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element
resolves10.1037/h0042519
The perceptron: A probabilistic model for information storage and organization in the brain.
resolves10.1109/34.598228
Eigenfaces vs. Fisherfaces: recognition using class specific linear projection
resolves10.1038/nmat3054
Short-term plasticity and long-term potentiation mimicked in single inorganic synapses
resolves10.1038/ncomms3072
Pattern classification by memristive crossbar circuits using ex situ and in situ training
resolves10.1002/adma.201203680
A Low Energy Oxide‐Based Electronic Synaptic Device for Neuromorphic Visual Systems with Tolerance to Device Variation
resolves10.1021/nl203687n
A Functional Hybrid Memristor Crossbar-Array/CMOS System for Data Storage and Neuromorphic Applications
resolves10.1088/0957-4484/24/38/384010
Integration of nanoscale memristor synapses in neuromorphic computing architectures
resolves10.1109/LED.2015.2481819
Programming Protocol Optimization for Analog Weight Tuning in Resistive Memories
resolves10.1109/ISLPED.2013.6629328
Energy characterization and instruction-level energy model of Intel's Xeon Phi processor
resolves10.1016/j.sysarc.2011.01.005
A comprehensive study of energy efficiency and performance of flash-based SSD
resolves10.3389/fnins.2016.00333
Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations
The 7 references without a DOI — listed, not checked
no DOI — not checkedLe, Q. V. in Acoustics, Speech and Signal Processing (ICASSP), 2013 IEEE International Conference 8595–8598 (IEEE, 2013).
no DOI — not checkedKrizhevsky, A., Sutskever, I. & Hinton, G. E. in Advances in Neural Information Processing Systems 1097–1105 (Curran Associates, Inc., 2012).
no DOI — not checkedSchiffmann, W., Joost, M. & Werner, R. Optimization of the backpropagation algorithm for training multilayer perceptrons. Univ. Koblenz. Inst. Phys. Rheinau 3–4 (1994).
no DOI — not checkedFackenthal, R. et al. in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International, 338–339 (IEEE, 2014).
no DOI — not checkedGovoreanu, B. et al. in Electron Devices Meeting (IEDM), 2011 IEEE International, 31.36. 31–31.36. 34 (IEEE, 2011).
no DOI — not checkedSekar, D. et al. in 2014 IEEE International Electron Devices Meeting, 28.23. 21–28.23. 24 (IEEE, 2014).
no DOI — not checkedBurr, G. et al. in 2015 IEEE International Electron Devices Meeting (IEDM), 4.4. 1–4.4. 4 (IEEE, 2015).
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