Reference health
Device and materials requirements for neuromorphic computing
90/90 checkable references clean · checked 2026-07-23
Every reference with a DOI in the deposited reference list resolved to a known work in Crossref or DataCite at the dated check, and none carried a retraction, withdrawal, or removal notice.
69 without a DOI — not checked. A reference deposited without a DOI is never matched by title or guessed at; it stays outside the checked set, and this line discloses that.
The 90 checked references that resolve
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Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
resolves10.1109/TCAD.2017.2682138
YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration
resolves10.1109/IEDM.2015.7409622
Device and system level design considerations for analog-non-volatile-memory based neuromorphic architectures
resolves10.1016/j.neucom.2005.11.021
Understanding spike-time-dependent plasticity: A biologically motivated computational model
resolves10.1109/JSSC.2013.2280296
A 130.7-$\hbox{mm}^{2}$ 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology
resolves10.1109/TMSCS.2016.2598742
Design of Resistive Synaptic Array for Implementing On-Chip Sparse Learning
resolves10.1002/adma.200900375
Redox‐Based Resistive Switching Memories – Nanoionic Mechanisms, Prospects, and Challenges
resolves10.1088/0034-4885/75/7/076502
Emerging memories: resistive switching mechanisms and current status
resolves10.1063/1.2818691
High speed resistive switching in Pt∕TiO2∕TiN film for nonvolatile memory application
resolves10.1143/JJAP.49.04DD17
Tungsten Oxide Resistive Memory Using Rapid Thermal Oxidation of Tungsten Plugs
resolves10.1109/LED.2009.2039021
Resistance Controllability of $\hbox{Ta}_{2} \hbox{O}_{5}/\hbox{TiO}_{2}$ Stack ReRAM for Low-Voltage and Multilevel Operation
resolves10.1002/adma.201701752
Nanometer‐Scale Phase Transformation Determines Threshold and Memory Switching Mechanism
resolves10.1016/j.carbon.2015.04.031
Nonvolatile/volatile behaviors and quantized conductance observed in resistive switching memory based on amorphous carbon
resolves10.1038/nmat3070
A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures
resolves10.1149/2.0011504ssl
Effect of Nitrogen Doping on Variability of TaOx -RRAM for Low-Power 3-Bit MLC Applications
resolves10.1109/LED.2016.2582859
Improved Synaptic Behavior Under Identical Pulses Using AlO<sub><italic>x</italic></sub>/HfO<sub>2</sub>Bilayer RRAM Array for Neuromorphic Systems
resolves10.1109/LED.2017.2719161
Improving Analog Switching in HfO<sub><italic>x</italic></sub>-Based Resistive Memory With a Thermal Enhanced Layer
resolves10.1038/srep21020
Novel Vertical 3D Structure of TaOx-based RRAM with Self-localized Switching Region by Sidewall Electrode Oxidation
resolves10.1038/nature14441
Training and operation of an integrated neuromorphic network based on metal-oxide memristors
resolves10.1109/LED.2016.2573140
Demonstration of Convolution Kernel Operation on Resistive Cross-Point Array
resolves10.1063/1.322942
Polarity-dependent memory switching and behavior of Ag dendrite in Ag-photodoped amorphous As2S3 films
resolves10.1186/1556-276X-7-614
Enhanced nanoscale resistive switching memory characteristics and switching mechanism using high-Ge-content Ge0.5Se0.5 solid electrolyte
resolves10.1109/LED.2008.2009774
Improvement of CBRAM Resistance Window by Scaling Down Electrode Size in Pure-GeTe Film
resolves10.1109/TED.2007.904402
Bipolar and Unipolar Resistive Switching in Cu-Doped $ \hbox{SiO}_{2}$
resolves10.1109/LED.2009.2036276
Resistive Switching Properties of $\hbox{Au}/ \hbox{ZrO}_{2}/\hbox{Ag}$ Structure for Low-Voltage Nonvolatile Memory Applications
resolves10.1109/TED.2008.2004246
Diffusivity of Cu Ions in Solid Electrolyte and Its Effect on the Performance of Nanometer-Scale Switch
resolves10.1063/1.4745783
Repeatable unipolar/bipolar resistive memory characteristics and switching mechanism using a Cu nanofilament in a GeOx film
resolves10.1088/0957-4484/22/25/254003
Electrochemical metallization memories—fundamentals, applications, prospects
resolves10.1186/s11671-015-0880-9
Conductive-bridging random access memory: challenges and opportunity for 3D architecture
resolves10.1109/LED.2009.2015687
Excellent Switching Uniformity of Cu-Doped $\hbox{MoO}_{x}/\hbox{GdO}_{x}$ Bilayer for Nonvolatile Memory Applications
resolves10.1186/1556-276X-7-345
Excellent resistive memory characteristics and switching mechanism using a Ti nanolayer at the Cu/TaOx interface
resolves10.1063/1.3696972
Impact of TaOx nanolayer at the GeSex/W interface on resistive switching memory performance and investigation of Cu nanofilament
resolves10.1063/1.3621835
Influence of the Cu-Te composition and microstructure on the resistive switching of Cu-Te/Al2O3/Si cells
resolves10.1109/LED.2017.2771718
Scaling the CBRAM Switching Layer Diameter to 30 nm Improves Cycling Endurance
resolves10.1002/adfm.201702010
Truly Electroforming‐Free and Low‐Energy Memristors with Preconditioned Conductive Tunneling Paths
resolves10.1021/nl201040y
Nanoelectronic Programmable Synapses Based on Phase Change Materials for Brain-Inspired Computing
resolves10.1002/adma.201101060
Arithmetic and Biologically‐Inspired Computing Using Phase‐Change Materials
resolves10.3389/fnins.2016.00056
Unsupervised Learning by Spike Timing Dependent Plasticity in Phase Change Memory (PCM) Synapses
resolves10.1038/s41467-017-01481-9
Temporal correlation detection using computational phase-change memory
resolves10.1063/1.4754138
W-Sb-Te phase-change material: A candidate for the trade-off between programming speed and data retention
resolves10.1109/JPROC.2017.2684830
Resistive Random Access Memory for Future Information Processing System
resolves10.1109/TED.2013.2241064
Endurance/Retention Trade-off on $\hbox{HfO}_{2}/\hbox{Metal}$ Cap 1T1R Bipolar RRAM
resolves10.1109/LED.2010.2102002
Modeling of Retention Failure Behavior in Bipolar Oxide-Based Resistive Switching Memory
resolves10.1063/1.3304167
Resistance-dependent amplitude of random telegraph-signal noise in resistive switching memories
resolves10.1088/0957-4484/26/45/455204
Fully parallel write/read in resistive synaptic array for accelerating on-chip learning
resolves10.1109/LED.2015.2481819
Programming Protocol Optimization for Analog Weight Tuning in Resistive Memories
resolves10.1109/LED.2015.2448756
An Electronic Synapse Device Based on Solid Electrolyte Resistive Random Access Memory
resolves10.1039/C6NR00476H
Engineering incremental resistive switching in TaO
<sub>x</sub>
based memristors for brain-inspired computing
resolves10.1109/TED.2011.2147791
An Electronic Synapse Device Based on Metal Oxide Resistive Switching Memory for Neuromorphic Computation
resolves10.1186/s11671-017-2330-3
Conduction Mechanism and Improved Endurance in HfO2-Based RRAM with Nitridation Treatment
resolves10.1109/VLSIT.2015.7223717
A-VMCO: A novel forming-free, self-rectifying, analog memory cell with low-current operation, nonfilamentary switching and excellent variability
resolves10.1109/TED.2012.2197951
Visual Pattern Extraction Using Energy-Efficient “2-PCM Synapse” Neuromorphic Architecture
resolves10.1147/rd.521.0031
Brain-scale simulation of the neocortex on the IBM Blue Gene/L supercomputer
resolves10.1109/TED.2016.2616483
Training a Probabilistic Graphical Model With Resistive Switching Electronic Synapses
resolves10.1109/JPROC.2014.2313565
Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations
resolves10.1109/TCAD.2015.2474396
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
resolves10.1109/JETCAS.2017.2771529
Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network Based on Analog Resistive Synapse
resolves10.1039/C6CP06004H
Electrochemical-reaction-induced synaptic plasticity in MoO
<sub>x</sub>
-based solid state electrochemical cells
resolves10.1109/LED.2015.2418342
Optimization of Conductance Change in Pr<sub>1–<i>x</i></sub>Ca<sub><i>x</i></sub>MnO<sub>3</sub>-Based Synaptic Devices for Neuromorphic Systems
resolves10.1109/LED.2017.2731859
Linking Conductive Filament Properties and Evolution to Synaptic Behavior of RRAM Devices for Neuromorphic Applications
The 69 references without a DOI — listed, not checked
no DOI — not checked1.1 computing’s energy problem (and what we can do about it)
no DOI — not checkedBRein memory: a 13-layer 4.2 K neuron/0.8 M synapse binary/ternary reconfigurable in-memory deep neural network accelerator in 65 nm CMOS
no DOI — not checkedBinary convolutional neural network on RRAM
no DOI — not checkedDaDianNao: a machine-learning supercomputer
no DOI — not checkedEIE: efficient inference engine on compressed deep neural network
no DOI — not checkedISAAC: a convolutional neural network accelerator with in situ analog arithmetic in crossbars
no DOI — not checkedPRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory
no DOI — not checkedRIMPA: a new reconfigurable dual-mode in-memory processing architecture with spin Hall effect-driven domain wall motion device
no DOI — not checkedSCNN: an accelerator for compressed-sparse convolutional neural networks
no DOI — not checkedEnergy efficient in-memory binary deep neural network accelerator with dual-mode SOT-MRAM
no DOI — not checkedNeuromorphic computing using non-volatile memory
no DOI — not checkedImageNet classification with deep convolutional neural networks
no DOI — not checkedVery deep convolutional networks for large-scale image recognition
no DOI — not checkedGoing deeper with convolutions
no DOI — not checkedLarge-scale video classification with convolutional neural networks
no DOI — not checkeddaaf784bib029
no DOI — not checkedInside volta: the world’s most advanced data center GPU
no DOI — not checkedCNN-benchmarks
no DOI — not checkedA 240 G-ops/s mobile coprocessor for deep neural networks
no DOI — not checkedDianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning
no DOI — not checkedShiDianNao: Shifting vision processing closer to the sensor
no DOI — not checkedOptimizing FPGA-based accelerator design for deep convolutional neural networks
no DOI — not checked4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications
no DOI — not checkedIn-datacenter performance analysis of a tensor processing unit
no DOI — not checkedA 0.3–2.6 TOPS/W precision-scalable processor for real-time large-scale ConvNets
no DOI — not checkedYou only look once: unified, real-time object detection
no DOI — not checkedA 14 nm logic technology featuring 2nd-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm2 SRAM cell size
no DOI — not checkedA 7 nm CMOS platform technology featuring 4th generation FinFET transistors with a 0.027 µm2 high density 6-T SRAM cell for mobile SoC applications
no DOI — not checkedNvidia volta architecture
no DOI — not checkedA 45 nm 1 Gb 1.8 V phase-change memory
no DOI — not checkedA 20 nm 1.8 V 8 Gb PRAM with 40 MB s−1 program bandwidth
no DOI — not checked19.7 A 16 Gb ReRAM with 200 MB s−1 write and 1 GB s−1 read in 27 nm technology
no DOI — not checkedA 4 Mb conductive-bridge resistive memory with 2.3 GB s−1 read-throughput and 216 MB s−1 program-throughput
no DOI — not checked23.5 A 4 Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture
no DOI — not checkedLarge-scale neural networks implemented with non-volatile memory as the synaptic weight element: impact of conductance response
no DOI — not checkedLow power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM
no DOI — not checkedBinary neural network with 16 Mb RRAM macro chip for classification and online training
no DOI — not checkedAdvanced a-VMCO resistive switching memory through inner interface engineering with wide (<102) on/off window, tunable µA-range switching current and excellent variability
no DOI — not checked3D synaptic architecture with ultralow sub-10 fJ energy per spike for neuromorphic computation
no DOI — not checkedAtomically thin graphene plane electrode for 3D RRAM
no DOI — not checkedA non-linear ReRAM cell with sub-1 µA ultralow operating current for high density vertical resistive memory (VRRAM)
no DOI — not checkedHfOx based vertical resistive random access memory for cost-effective 3D cross-point architecture without cell selector
no DOI — not checkedHyperdimensional computing with 3D VRRAM in-memory kernels: device-architecture co-design for energy-efficient, error-resilient language recognition
no DOI — not checkedSb-doped GeS2 as performance and reliability booster in conductive bridge RAM
no DOI — not checkedHighly scalable nonvolatile TiOx/TaSiOy solid-electrolyte crossbar switch integrated in local interconnect for low power reconfigurable logic
no DOI — not checked90 nm W\Al2O3\TiW\Cu 1T1R CBRAM cell showing low-power, fast and disturb-free operation
no DOI — not checkedA novel resistance memory with high scalability and nanosecond switching
no DOI — not checkedModeling the switching dynamics of programmable-metallization-cell (PMC) memory and its application as synapse device for a neuromorphic computation system
no DOI — not checkedStochastic synapses enable efficient brain-inspired learning machines
no DOI — not checkedSynaptic devices based on phase-change memory
no DOI — not checkedPhase change memory as synapse for ultra-dense neuromorphic systems: application to complex visual pattern extraction
no DOI — not checkedInterface engineering of PCM for improved synaptic performance in neuromorphic systems
no DOI — not checkedExperimental demonstration and tolerancing of a large-scale neural network (165 000 synapses), using phase-change memory as the synaptic weight element
no DOI — not checkedExperimental demonstration of array-level learning with phase change synaptic devices
no DOI — not checkedNVM neuromorphic core with 64 k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in situ learning
no DOI — not checkedOxide-based analog synapse: physical modeling, experimental characterization, and optimization
no DOI — not checkedModeling disorder effect of the oxygen vacancy distribution in filamentary analog RRAM for neuromorphic computing
no DOI — not checkedNeuromorphic speech systems using advanced ReRAM-based synapse
no DOI — not checkedComprehensive understanding of conductive filament characteristics and retention properties for highly reliable ReRAM
no DOI — not checkedCBRAM devices as binary synapses for low-power stochastic neuromorphic systems: auditory (cochlea) and visual (retina) cognitive processing applications
no DOI — not checkedConductive filament scaling of TaOx bipolar ReRAM for long retention with low current operation
no DOI — not checkedFundamental limitations of existing models and future solutions for dielectric reliability and RRAM applications
no DOI — not checkedTowards high-speed, write-disturb tolerant 3D vertical RRAM arrays
no DOI — not checkedTime-dependent variability in RRAM-based analog neuromorphic system for pattern recognition
no DOI — not checkedNeuroSim+: an integrated device-to-algorithm framework for benchmarking synaptic devices and array architectures
no DOI — not checkedTechnology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip
no DOI — not checkedLarge-scale deep unsupervised learning using graphics processors
no DOI — not checkedBuilding high-level features using large scale unsupervised learning
no DOI — not checkeddaaf784bib154
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