Reference health
A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells
19/19 checkable references clean · checked 2026-07-23
Every reference with a DOI in the deposited reference list resolved to a known work in Crossref or DataCite at the dated check, and none carried a retraction, withdrawal, or removal notice.
12 without a DOI — not checked. A reference deposited without a DOI is never matched by title or guessed at; it stays outside the checked set, and this line discloses that.
The 19 checked references that resolve
resolves10.1007/978-3-319-46493-0_32
XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks
resolves10.1109/TIE.2018.2875643
A 34-FPS 698-GOP/s/W Binarized Deep Neural Network-Based Natural Scene Text Interpretation Accelerator for Mobile Edge Computing
resolves10.23919/DATE.2018.8342235
XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks
resolves10.1109/CoolChips.2018.8373076
XNORBIN: A 95 TOp/s/W hardware accelerator for binary convolutional neural networks
resolves10.1109/FPT.2016.7929552
A memory-based realization of a binarized deep convolutional neural network
resolves10.1016/j.ic.2013.04.002
Decomposition of threshold functions into bounded fan-in threshold functions
resolves10.1109/ICCV.2015.123
Delving Deep into Rectifiers: Surpassing Human-Level Performance on ImageNet Classification
resolves10.1145/3020078.3021740
Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks?
resolves10.1109/MSP.2012.2205597
Deep Neural Networks for Acoustic Modeling in Speech Recognition: The Shared Views of Four Research Groups
resolves10.1109/TNANO.2018.2822285
Maximizing the Number of Threshold Logic Functions Using Resistive Memory
resolves10.1109/TVLSI.2016.2527783
Reducing Power, Leakage, and Area of Standard-Cell ASICs Using Threshold Logic Flip-Flops
The 12 references without a DOI — listed, not checked
no DOI — not checkedref31
no DOI — not checkedref30
no DOI — not checkedFINN: A Framework for Fast, Scalable Binarized Neural Network Inference
no DOI — not checkedThe high-dimensional geometry of binary neural networks
no DOI — not checkedYodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration
no DOI — not checkedFaster R-CNN: Towards realtime object detection with region proposal networks
no DOI — not checkedref7
no DOI — not checkedImagenet classification with deep convolutional neural networks
no DOI — not checkedref9
no DOI — not checkedref22
no DOI — not checkedDesign of a robust, high performance standard cell threshold logic family for deep sub-micron technology
no DOI — not checkedref23
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