Reference health
Techniques for Multicore Thermal Management: Classification and New Exploration
1 of 18 checkable references need attention · checked 2026-07-22
At the dated check, the references listed below either did not resolve in Crossref or DataCite, or carried a retraction notice. Each one is shown with the registry record that put it there.
20 without a DOI — not checked. A reference deposited without a DOI is never matched by title or guessed at; it stays outside the checked set, and this line discloses that.
References needing attention
does not resolve to a known work10.1109/LPE.2004.1349305
The 17 checked references that resolve
resolves10.1145/1024393.1024423
Formal online methods for voltage/frequency control in multiple clock domain microprocessors
resolves10.1145/502217.502254
Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads
resolves10.1109/HPCA.2002.995695
Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management
resolves10.1109/40.888701
Power-aware microarchitecture: design and modeling challenges for next-generation microprocessors
The 20 references without a DOI — listed, not checked
no DOI — not checkedPower efficiency of multiple clock multiple voltage cores
no DOI — not checkedDynamic thermal management for distributed systems
no DOI — not checkedCompact thermal modeling for temperature-aware design
no DOI — not checkedA feedback-driven proportion allocator for real-rate scheduling
no DOI — not checkedManaging the impact of increasing microprocessor power consumption
no DOI — not checkedA dynamic compilation framework for controlling microprocessor energy and performance
no DOI — not checkedDesign choices for thermal control in dual-core processors
no DOI — not checkedVoltage and frequency control with adaptive reaction time in multiple-clock-domain processors
no DOI — not checkedResearch challenges on temperature-aware computer systems
no DOI — not checkedPower-performance implications of thread-level parallelism on chip multiprocessors
no DOI — not checkedPerformance, energy, and thermal considerations for SMT and CMP architectures
no DOI — not checkedX86 power and thermal management
no DOI — not checkedEvent-driven thermal management in SMP systems
no DOI — not checkedSmart chip, system and data center: Dynamic provisioning of power and cooling from chip core to the cooling tower
no DOI — not checkedHeat-and-run: Leveraging SMT and CMP to manage power density through the operating system
no DOI — not checkedLeveraging simultaneous multithreading for adaptive thermal control
no DOI — not checked1
no DOI — not checkedThermal-effective clustered microarchitectures
no DOI — not checkedTemperature-aware design issues for SMT and CMP architectures
no DOI — not checkedDesign and implementation of the POWERS? microprocessor
What this badge says. CiteStamped means the CHECKABLE references of this
work were clean at the dated check: each resolved to a known work in a public registry, and none
carried a retraction notice at that time. It says nothing about the quality, findings,
or importance of the work itself, and nothing about references deposited without a DOI.
checked 2026-07-22 — re-checked daily as this page is visited; titles and statuses come from Crossref and DataCite and are not part of the signed record
Embed this badge
Both snippets point at the live badge image and link back to this page. The badge re-renders from the daily check, so an embed never goes stale by more than a day of visits.
<a href="https://citestamp.com/citestamped/10.1109/isca.2006.39"><img src="https://citestamp.com/citestamped/10.1109/isca.2006.39/badge.svg" alt="CiteStamped reference-health badge" width="460" height="64"></a>
[](https://citestamp.com/citestamped/10.1109/isca.2006.39)