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Design Flow for Hybrid CMOS/Memristor Systems—Part I: Modeling and Verification Steps

https://doi.org/10.1109/tcsi.2021.3122343
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46/46 checkable references clean · checked 2026-07-23

Every reference with a DOI in the deposited reference list resolved to a known work in Crossref or DataCite at the dated check, and none carried a retraction, withdrawal, or removal notice.

2 without a DOI — not checked. A reference deposited without a DOI is never matched by title or guessed at; it stays outside the checked set, and this line discloses that.

The 46 checked references that resolve
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resolves10.1109/TCSI.2019.2957813
Theoretical Foundations of Memristor Cellular Nonlinear Networks: Stability Analysis With Dynamic Memristors
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resolves10.1038/s41598-017-17785-1
Multibit memory operation of metal-oxide bi-layer memristors
resolves10.1145/2736285
A Novel Memristor-Based Hardware Security Primitive
resolves10.1109/TCT.1971.1083337
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resolves10.1109/TED.2013.2246791
A Comprehensive Crossbar Array Model With Solutions for Line Resistance and Nonlinear Device Characteristics
resolves10.1109/TCSI.2015.2476296
Practical Determination of Individual Element Resistive States in Selectorless RRAM Arrays
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Ultrafast Synaptic Events in a Chalcogenide Memristor
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A Complete Analytical Solution for the On and Off Dynamic Equations of a TaO Memristor
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Compact Modeling of the Switching Dynamics and Temperature Dependencies in TiO<i>ₓ</i> Memristors—Part II: Physics-Based Model
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High-Performance Nanocomposite Based Memristor with Controlled Quantum Dots as Charge Traps
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The 2 references without a DOI — listed, not checked
no DOI — not checkedUniting gradual and abrupt SET processes in resistive switching oxides
no DOI — not checkedMemristive synapses are becoming reality
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