At the dated check, the references listed below either did not resolve in
Crossref or DataCite, or carried a retraction notice. Each one is shown with the
registry record that put it there.
The 18 checked references that resolve
resolves10.1145/1465482.1465560Validity of the single processor approach to achieving large scale computing capabilities
resolves10.1109/MICRO.2010.36Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
resolves10.1109/MC.2008.494Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era
The 8 references without a DOI — listed, not checked
no DOI — not checkedA. Bakhoda , G. L. Yuan , W. W. L. Fung , H. Wong , and T. M. Aamodt . Analyzing CUDA workloads using a detailed GPU simulator . In ISPASS '09 . A. Bakhoda, G. L. Yuan, W. W. L. Fung, H. Wong, and T. M. Aamodt. Analyzing CUDA workloads using a detailed GPU simulator. In ISPASS '09.
no DOI — not checkedS. Borkar . The exascale challenge. Keynote at International Symposium on VLSI Design , Automation and Test (VLSI-DAT) , 2010 . S. Borkar. The exascale challenge. Keynote at International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2010.
no DOI — not checkedM. Hempstead , G.-Y. Wei , and D. Brooks . Navigo: An early-stage model to study power-contrained architectures and specialization . In MoBS '09 . M. Hempstead, G.-Y. Wei, and D. Brooks. Navigo: An early-stage model to study power-contrained architectures and specialization. In MoBS '09.
no DOI — not checkedM. Horowitz , E. Alon , D. Patil , S. Naffziger , R. Kumar , and K. Bernstein . Scaling, power, and the future of CMOS . In IEDM '05 . M. Horowitz, E. Alon, D. Patil, S. Naffziger, R. Kumar, and K. Bernstein. Scaling, power, and the future of CMOS. In IEDM '05.
no DOI — not checkedITRS. International technology roadmap for semiconductors , 2010 update , 2011 . URL http://www.itrs.net. ITRS. International technology roadmap for semiconductors, 2010 update, 2011. URL http://www.itrs.net.
no DOI — not checkedG. Loh . The cost of uncore in throughput-oriented many-core processors . In ALTA '08 . G. Loh. The cost of uncore in throughput-oriented many-core processors. In ALTA '08.
no DOI — not checkedG. E. Moore . Cramming more components onto integrated circuits. phElectronics, 38 (8) , April 1965 . G. E. Moore. Cramming more components onto integrated circuits. phElectronics, 38 (8), April 1965.
no DOI — not checkedSPEC. Standard performance evaluation corporation 2011. URL http://www.spec.org. SPEC. Standard performance evaluation corporation 2011. URL http://www.spec.org.
checked 2026-07-22 — re-checked daily as this page is visited;
titles and statuses come from Crossref and DataCite and are not part of the signed record
Both snippets point at the live badge image and link back to this page. The
badge re-renders from the daily check, so an embed never goes stale by more than a day of visits.