Reference health

Design of FinFET Based Self-Biased OTA for Low Power Applications

https://doi.org/10.2139/ssrn.3356294
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21/21 checkable references clean · checked 2026-08-25

Every reference with a DOI in the deposited reference list resolved to a known work in Crossref or DataCite at the dated check, and none carried a retraction, withdrawal, or removal notice.

3 without a DOI — not checked. A reference deposited without a DOI is never matched by title or guessed at; it stays outside the checked set, and this line discloses that.

The 21 checked references that resolve
resolves10.1109/MCD.2004.1263404
Turning silicon on its edge
resolves10.1109/led.2012.2204853
Device Design Guidelines for Nanoscale FinFETs in RF/Analog Applications
resolves10.1016/j.aeue.2013.08.019
Bulk-driven floating-gate and bulk-driven quasi-floating-gate techniques for low-voltage low-power analog circuits design
resolves10.1016/j.aeue.2012.03.015
0.5 V bulk-driven analog building blocks
resolves10.1109/82.700924
Designing 1-V op amps using standard digital CMOS technology
resolves10.1109/4.987079
A 0.9-V 0.5-μA rail-to-rail CMOS operational amplifier
resolves10.1109/jssc.2005.856280
0.5-V analog circuit techniques and their application in OTA and filter design
resolves10.1109/tcsii.2007.902216
An Ultra-Low-Voltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing
resolves10.1109/TCSI.2013.2289413
A 60-dB Gain OTA Operating at 0.25-V Power Supply in 130-nm Digital CMOS Process
resolves10.1109/edl.1983.25781
Channel edge doping (CED) method for reducing the short-channel effect
resolves10.1109/16.887014
FinFET-a self-aligned double-gate MOSFET scalable to 20 nm
resolves10.1109/inmmic.2017.7927300
Physics-based modeling of FinFET RF variability under Shorted- and Independent-Gates bias
resolves10.1016/j.aeue.2017.02.012
A read disturbance free differential read SRAM cell for low power and reliable cache in embedded processor
resolves10.1109/cloudcom.2010.63
Sustainable Network Resource Management System for Virtual Private Clouds
resolves10.1109/tcsi.2009.2015178
Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices
resolves10.1109/TCSI.2013.2239161
Low-Voltage Bulk-Driven Operational Amplifier With Improved Transconductance
resolves10.1109/tcsi.2015.2469011
An Ultra-Low-Voltage CMOS Process-Insensitive Self-Biased OTA With Rail-to-Rail Input Range
resolves10.1109/jssc.2003.809520
A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector
resolves10.1109/4.44990
1-V operational amplifier with rail-to-rail input and output ranges
resolves10.1109/4.823447
Three-stage large capacitive load amplifier with damping-factor-control frequency compensation
resolves10.1109/mwscas.2013.6674772
Comparative analysis of double gate FinFET configurations for analog circuit design
The 3 references without a DOI — listed, not checked
no DOI — not checkedA Low-Voltage and Low-Power Two-Stage Operational Amplifier Using FinFET Transistors
no DOI — not checkedLow voltage analog circuit design techniques: A tutorial
no DOI — not checkedDesign of a Low Voltage Low Power Self-biased OTA Using Independent Gate FinFET and PTM Models
What this badge says. CiteStamped means the CHECKABLE references of this work were clean at the dated check: each resolved to a known work in a public registry, and none carried a retraction notice at that time. It says nothing about the quality, findings, or importance of the work itself, and nothing about references deposited without a DOI.

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