Reference health
Hardware Optimized and Error Reduced Approximate Adder
30/30 checkable references clean · checked 2026-07-23
Every reference with a DOI in the deposited reference list resolved to a known work in Crossref or DataCite at the dated check, and none carried a retraction, withdrawal, or removal notice.
2 without a DOI — not checked. A reference deposited without a DOI is never matched by title or guessed at; it stays outside the checked set, and this line discloses that.
The 30 checked references that resolve
resolves10.1109/ETS.2013.6569370
Approximate computing: An emerging paradigm for energy-efficient design
resolves10.1145/2897937.2905009
Invited - Cross-layer approximations for neuromorphic computing: from devices to circuits and systems
resolves10.1109/JETCAS.2018.2835809
Energy Efficient Neural Computing: A Study of Cross-Layer Approximations
resolves10.1109/ISVLSI.2015.41
Near/Sub-Threshold Circuits and Approximate Computing: The Perfect Combination for Ultra-Low-Power Systems
resolves10.1145/3094124
A Review, Classification, and Comparative Evaluation of Approximate Arithmetic Circuits
resolves10.1109/TVLSI.2009.2020591
Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing
resolves10.1109/SOCDC.2010.5682905
Enhanced low-power high-speed adder for error-tolerant application
resolves10.1109/TCSI.2009.2027626
Bio-Inspired Imprecise Computational Blocks for Efficient VLSI Implementation of Soft-Computing Applications
resolves10.1109/TVLSI.2018.2822278
Systematic Design of an Approximate Adder: The Optimized Lower Part Constant-OR Adder
resolves10.1109/FPT.2016.7929536
FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs
resolves10.1109/ICCAD.2013.6691096
On reconfiguration-oriented approximate adder design and its application
resolves10.1109/TVLSI.2015.2424212
Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding
resolves10.1109/TC.2018.2859960
An Efficient Method for Calculating the Error Statistics of Block-Based Approximate Adders
The 2 references without a DOI — listed, not checked
no DOI — not checkedZhu, N., Goh, W.L., and Yeo, K.S. (2009, January 14–16). An enhanced low-power high-speed adder for error-tolerant application. Proceedings of the 12th International Symposium on Integrated Circuits, Singapore.
no DOI — not checked(2019, May 29). Synopsys SAED_EDK32/28_CORE Databook. Available online: https://www.synopsys.com/community/university-program/teaching-resources.html.
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