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Hardware‐assisted software event tracing

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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/cpe.4068openalex-snapshot
Multi‐scale navigation of large trace data: A survey
inferredcites →https://doi.org/10.1109/asicon.2011.6157171openalex-snapshot
A software/hardware co-debug platform for multi-core systems
inferredcites →https://doi.org/10.1109/i2mtc.2012.6229331openalex-snapshot
Trace and debug port based watchdog processor
inferredcites →https://doi.org/10.1109/ieeestd.2010.5412866openalex-snapshot
IEEE Standard for Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture
inferredcites →https://doi.org/10.1109/vdat.2011.5783594openalex-snapshot
Multi-core software/hardware co-debug platform with ARM CoreSight™, on-chip test architecture and AXI/AHB bus monitor
inferredcites →https://doi.org/10.1145/1519065.1519087openalex-snapshot
Tralfamadore
inferredcites →https://doi.org/10.1145/1985793.1985935openalex-snapshot
Exploiting hardware advances for software testing and debugging (NIER track)
inferredcites →https://doi.org/10.1145/2103799.2103807openalex-snapshot
Security breaches as PMU deviation

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-030-03769-7_28openalex-snapshot
A Framework for Non-intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration
inferred← citeshttps://doi.org/10.1007/s10766-019-00631-4openalex-snapshot
Efficient Methods for Trace Analysis Parallelization
inferred← citeshttps://doi.org/10.1007/s41635-018-0061-2openalex-snapshot
Machine Learning-Based EDoS Attack Detection Technique Using Execution Trace Analysis
inferred← citeshttps://doi.org/10.1016/j.sysarc.2019.02.016openalex-snapshot
Efficient large-scale heterogeneous debugging using dynamic tracing
inferred← citeshttps://doi.org/10.1038/s41598-024-65374-wopenalex-snapshot
A practical approach for finding anti-debugging routines in the Arm-Linux using hardware tracing
inferred← citeshttps://doi.org/10.1109/ic2ecs60824.2023.10493636openalex-snapshot
RISC-V Hardware Debugging System Design for Embedded Microprocessors
inferred← citeshttps://doi.org/10.1109/iccd65941.2025.00101openalex-snapshot
Design and Evaluation of an N-Trace Compliant Hardware Tracer for RISC-V Processors
inferred← citeshttps://doi.org/10.1109/iwcmc61514.2024.10592348openalex-snapshot
Exploring the Frontiers of Firmware Fuzzing: μAFL’s Application on Cortex M4 and Unix Programs
inferred← citeshttps://doi.org/10.1109/rtcsa66114.2025.00021openalex-snapshot
From Tracepoints to Timeliness: A Semi-Markov Framework for Predictive Runtime Analysis
inferred← citeshttps://doi.org/10.1109/syscon48628.2021.9447094openalex-snapshot
Malware System Calls Detection Using Hybrid System
inferred← citeshttps://doi.org/10.1109/tdsc.2019.2906161openalex-snapshot
Checking is Believing: Event-Aware Program Anomaly Detection in Cyber-Physical Systems
inferred← citeshttps://doi.org/10.1109/tifs.2022.3183409openalex-snapshot
Retrofitting LBR Profiling to Enhance Virtual Machine Introspection
inferred← citeshttps://doi.org/10.1145/3134600.3134640openalex-snapshot
Orpheus
inferred← citeshttps://doi.org/10.2200/s00800ed1v01y201709spt022openalex-snapshot
Anomaly Detection as a Service: Challenges, Advances, and Opportunities
inferred← citeshttps://doi.org/10.23919/date58400.2024.10546666openalex-snapshot
High Throughput Hardware Accelerated CoreSight Trace Decoding
inferred← citeshttps://doi.org/10.3390/s21165560openalex-snapshot
Distributed Architecture for an Integrated Development Environment, Large Trace Analysis, and Visualization
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