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Implementation of embedded emulated‐digital CNN‐UM global analogic programming unit on FPGA and its application

https://doi.org/10.1002/cta.507
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/cta.191openalex-snapshot
ACE4k: An analog I/O 64×64 visual microprocessor chip with 7‐bit analog accuracy
inferredcites →https://doi.org/10.1002/cta.363openalex-snapshot
Emulated digital CNN‐UM solution of partial differential equations
inferredcites →https://doi.org/10.1023/a:1008141017714openalex-snapshot
An Emulated Digital CNN Implementation
inferredcites →https://doi.org/10.1109/31.7600openalex-snapshot
Cellular neural networks: theory
inferredcites →https://doi.org/10.1109/82.222815openalex-snapshot
The CNN universal machine: an analogic array computer
inferredcites →https://doi.org/10.1109/cnna.1994.381706openalex-snapshot
A fast, complex and efficient test implementation of the CNN Universal Machine
inferredcites →https://doi.org/10.1109/cnna.2005.1543177openalex-snapshot
Elastic Wave Propagation Modeling on Emulated Digital CNN-UM Architecture
inferredcites →https://doi.org/10.1109/cnna.2006.341627openalex-snapshot
Implementation of Nonlinear Template Runner Emulated Digital CNN-UM on FPGA
inferredcites →https://doi.org/10.1109/ecctd.2007.4529593openalex-snapshot
Emulated digital CNN solution for two dimensional compressible flows
inferredcites →https://doi.org/10.1109/iscas.2003.1205070openalex-snapshot
Vision systems based on the 128×128 focal plane cellular visual microprocessor chips
inferredcites →https://doi.org/10.1109/iscas.2005.1465957openalex-snapshot
Various implementations of topographic, sensory, cellular wave computers
inferredcites →https://doi.org/10.1109/tcsi.2003.812611openalex-snapshot
Configurable multilayer CNN-UM emulator on FPGA

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/cta.1900openalex-snapshot
Application of dynamic counter circuits in programmable digital pixel sensor architectures
inferred← citeshttps://doi.org/10.1002/cta.2457openalex-snapshot
Digital implementation of biologically inspired Wilson model, population behavior, and learning
inferred← citeshttps://doi.org/10.1002/cta.2596openalex-snapshot
Digital realization of the proposed linear model of the H odgkin‐ H uxley neuron
inferred← citeshttps://doi.org/10.1002/cta.3025openalex-snapshot
Implementation of Scale Invariant Feature Transform detector on FPGA for low‐power wearable devices for prostheses control
inferred← citeshttps://doi.org/10.1002/cta.3401openalex-snapshot
The deep multichannel discrete‐time cellular neural network model for classification
inferred← citeshttps://doi.org/10.1002/cta.578openalex-snapshot
An efficient paradigm for wavelet‐based image processing using cellular neural networks
inferred← citeshttps://doi.org/10.1002/cta.614openalex-snapshot
Asynchronous demodulation technique for use in vision sensor image classification and segmentation
inferred← citeshttps://doi.org/10.1002/cta.623openalex-snapshot
On IIR‐based bit‐stream multipliers
inferred← citeshttps://doi.org/10.1007/978-3-642-21326-7_22openalex-snapshot
An Expandable Hardware Platform for Implementation of CNN-Based Applications
inferred← citeshttps://doi.org/10.1007/s11554-014-0451-9openalex-snapshot
NEROvideo: a general-purpose CNN-UM video processing system
inferred← citeshttps://doi.org/10.1007/s12668-020-00795-1openalex-snapshot
Memristive Devices for Neuromorphic Applications: Comparative Analysis
inferred← citeshttps://doi.org/10.1016/j.neucom.2010.03.021openalex-snapshot
Artificial neural networks in hardware: A survey of two decades of progress
inferred← citeshttps://doi.org/10.1016/j.neucom.2012.09.029openalex-snapshot
An efficient and expandable hardware implementation of multilayer cellular neural networks
inferred← citeshttps://doi.org/10.1016/j.neucom.2014.09.071openalex-snapshot
A scalable CNN architecture and its application to short exposure stellar images processing on a HPRC
inferred← citeshttps://doi.org/10.1016/j.vlsi.2017.09.009openalex-snapshot
Customizable embedded processor array for multimedia applications
inferred← citeshttps://doi.org/10.1109/cnna.2010.5430298openalex-snapshot
Simplified state update calculation for fast and accurate digital emulation of CNN dynamics
inferred← citeshttps://doi.org/10.1109/cnna.2010.5430316openalex-snapshot
A new architecture for Cellular Neural Network on reconfigurable hardware with an advance memory allocation method
inferred← citeshttps://doi.org/10.1109/cnna.2010.5430341openalex-snapshot
A CNN motivated array computing model
inferred← citeshttps://doi.org/10.1109/cnna.2012.6331447openalex-snapshot
Visual sense-and-avoid system for UAVs
inferred← citeshttps://doi.org/10.1109/cnna.2012.6331451openalex-snapshot
Analysis of a GPU based CNN implementation
inferred← citeshttps://doi.org/10.1109/cnna.2012.6331475openalex-snapshot
Cellular processor array based UAV safety system
inferred← citeshttps://doi.org/10.1109/ecctd.2009.5275115openalex-snapshot
CNN model on stream processing platform
inferred← citeshttps://doi.org/10.1109/ecctd.2013.6662202openalex-snapshot
NERO mastering 300k CNN cells
inferred← citeshttps://doi.org/10.1109/iscas.2012.6271640openalex-snapshot
Volume and power optimized high-performance system for UAV collision avoidance
inferred← citeshttps://doi.org/10.1109/recosoc.2011.5981513openalex-snapshot
A self-reconfigurable platform for general purpose image processing systems on low-cost spartan-6 FPGAs
inferred← citeshttps://doi.org/10.2514/6.2014-0604openalex-snapshot
Towards Real-Time Visual and IMU Data Fusion
inferred← citeshttps://doi.org/10.31428/10317/2763openalex-snapshot
Diseño e implementación sobre hardware reconfigurable de una arquitectura para la emulación en tiempo real de redes neuronales celulares
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