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Stochastic bitstream‐based CNN and its implementation on FPGA
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/cta.191openalex-snapshot
ACE4k: An analog I/O 64×64 visual microprocessor chip with 7‐bit analog accuracy
inferredcites →https://doi.org/10.1002/cta.343openalex-snapshot
Non‐linear coupled CNN models for multiscale image analysis
inferredcites →https://doi.org/10.1002/cta.363openalex-snapshot
Emulated digital CNN‐UM solution of partial differential equations
inferredcites →https://doi.org/10.1002/cta.367openalex-snapshot
Digital implementation of cellular sensor‐computers
inferredcites →https://doi.org/10.1007/978-1-4899-5841-9_2openalex-snapshot
Stochastic Computing Systems
inferredcites →https://doi.org/10.1016/j.chaos.2005.04.067openalex-snapshot
Exponential stability analysis of stochastic delayed cellular neural network
inferredcites →https://doi.org/10.1017/cbo9780511754494openalex-snapshot
Cellular Neural Networks and Visual Computing
inferredcites →https://doi.org/10.1023/a:1008141017714openalex-snapshot
An Emulated Digital CNN Implementation
inferredcites →https://doi.org/10.1049/el:19940223openalex-snapshot
Emergent activation functions from a stochasticbit-stream neuron
inferredcites →https://doi.org/10.1109/72.129416openalex-snapshot
Functional abilities of a stochastic logic neural network
inferredcites →https://doi.org/10.1109/72.80295openalex-snapshot
Programmable impulse neural circuits
inferredcites →https://doi.org/10.1109/cnna.2006.341625openalex-snapshot
A Control System for a Cellular Processor Array
inferredcites →https://doi.org/10.1109/fpga.1993.279462openalex-snapshot
A stochastic neural architecture that exploits dynamically reconfigurable FPGAs
inferredcites →https://doi.org/10.1109/fpga.1994.315612openalex-snapshot
FPGA-based stochastic neural networks-implementation
inferredcites →https://doi.org/10.1109/iscas.2005.1465957openalex-snapshot
Various implementations of topographic, sensory, cellular wave computers
inferredcites →https://doi.org/10.1109/mcas.2005.1438738openalex-snapshot
Bi-i: a standalone ultra high speed cellular vision system
inferredcites →https://doi.org/10.1109/tcsi.2003.812611openalex-snapshot
Configurable multilayer CNN-UM emulator on FPGA
inferredcites →https://doi.org/10.1109/tcsi.2004.827621openalex-snapshot
ACE16k: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCs
inferredcites →https://doi.org/10.1109/tcsi.2004.840093openalex-snapshot
A general-purpose processor-per-pixel analog SIMD vision chip
inferredcites →https://doi.org/10.1140/epjb/e2006-00244-4openalex-snapshot
Stochastic simulations on the cellular wave computers
inferredcites →https://doi.org/10.1142/s0129065703001704openalex-snapshot
ON STABILITY OF CELLULAR NEURAL NETWORKS WITH POLYNOMIAL INTERACTIONS
inferredcites →https://doi.org/10.1142/s0218126603001148openalex-snapshot
THE NEW FRAMEWORK OF APPLICATIONS: THE ALADDIN SYSTEM
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cta.2374openalex-snapshot
Chaotic cellular neural network‐based true random number generator
inferred← citeshttps://doi.org/10.1002/cta.2457openalex-snapshot
Digital implementation of biologically inspired Wilson model, population behavior, and learning
inferred← citeshttps://doi.org/10.1002/cta.2596openalex-snapshot
Digital realization of the proposed linear model of the H odgkin‐ H uxley neuron
inferred← citeshttps://doi.org/10.1002/cta.3219openalex-snapshot
Highly accurate division and square root circuits by exploiting signal correlation in stochastic computing
inferred← citeshttps://doi.org/10.1002/cta.638openalex-snapshot
CMOL implementation of spiking neurons and spike‐timing dependent plasticity
inferred← citeshttps://doi.org/10.1002/cta.662openalex-snapshot
Improving Networks‐on‐Chip performability: A topology‐based approach
inferred← citeshttps://doi.org/10.1002/cta.685openalex-snapshot
Fast‐squarer circuits using 3‐bit‐scan without overlapping bits
inferred← citeshttps://doi.org/10.1002/cta.796openalex-snapshot
Design space exploration for sparse matrix‐matrix multiplication on FPGAs
inferred← citeshttps://doi.org/10.1016/j.neucom.2010.03.021openalex-snapshot
Artificial neural networks in hardware: A survey of two decades of progress
inferred← citeshttps://doi.org/10.1021/acs.chemrev.4c00631openalex-snapshot
Two-Dimensional Materials for Brain-Inspired Computing Hardware
inferred← citeshttps://doi.org/10.1080/10584587.2015.1029408openalex-snapshot
Adaptive Boolean Logic Using Ferroelectrics Capacitors as Basic Units of Artificial Neurons and Its Implementation in FPGA
inferred← citeshttps://doi.org/10.1115/1.4023241openalex-snapshot
A Novel General and Robust Method Based on NAOP for Solving Nonlinear Ordinary Differential Equations and Partial Differential Equations by Cellular Neural Networks
inferred← citeshttps://doi.org/10.3390/s120708895openalex-snapshot
An ANN-Based Smart Tomographic Reconstructor in a Dynamic Environment
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