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Software architecture for hard real-time applications: Cyclic executives vs. fixed priority executives

https://doi.org/10.1007/bf00365463
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Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/bf02341919openalex-snapshot
The cyclic executive model and Ada
inferredcites →https://doi.org/10.1109/12.57058openalex-snapshot
Priority inheritance protocols: an approach to real-time synchronization
inferredcites →https://doi.org/10.1109/2.55469openalex-snapshot
Real-time scheduling theory and Ada
inferredcites →https://doi.org/10.1109/real.1989.63567openalex-snapshot
The rate monotonic scheduling algorithm: exact characterization and average case behavior
inferredcites →https://doi.org/10.1145/321738.321743openalex-snapshot
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment

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The One-Shot Task Model for Robust Real-Time Embedded Control Systems
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Automatically Configuring Time-Triggered Schedulers for Use With Resource-Constrained, Single-Processor Embedded Systems
inferred← citeshttps://doi.org/10.1109/trustcom.2016.0341openalex-snapshot
On the Definition of Real-Time: Applications and Systems
inferred← citeshttps://doi.org/10.1109/uic-atc.2010.13openalex-snapshot
Providing Real-Time Guarantees to Smart Car
inferred← citeshttps://doi.org/10.1109/wcre.2002.1173073openalex-snapshot
Practice patterns for architecture reconstruction
inferred← citeshttps://doi.org/10.1109/wicsa.2001.948405openalex-snapshot
MAP - mining architectures for product line evaluations
inferred← citeshttps://doi.org/10.1109/wicsa.2016.11openalex-snapshot
Modern Software Architecture for Embedded Real-Time Devices: High Value, Little Overhead
inferred← citeshttps://doi.org/10.1109/wpdrts.1995.470508openalex-snapshot
On the use of Ada tasking in the building of satellite control software
inferred← citeshttps://doi.org/10.1115/detc2007-35369openalex-snapshot
Improving the Performance of Time-Triggered Embedded Systems by Means of a Scheduler Agent
inferred← citeshttps://doi.org/10.1145/174194.174208openalex-snapshot
Analysis of polling protocols for fieldbus networks
inferred← citeshttps://doi.org/10.1145/1850771.1850779openalex-snapshot
Cyclic executive for safety-critical Java on chip-multiprocessors
inferred← citeshttps://doi.org/10.1145/216633.216654openalex-snapshot
Language constructs and transformation for hard real-time systems
inferred← citeshttps://doi.org/10.1145/2512989.2512991openalex-snapshot
Safety-critical Java level 2
inferred← citeshttps://doi.org/10.1145/337292.337556openalex-snapshot
Schedulability-driven performance analysis of multiple mode embedded real-time systems
inferred← citeshttps://doi.org/10.1145/959221.959237openalex-snapshot
Execution-time clocks and Ravenscar kernels
inferred← citeshttps://doi.org/10.11648/j.ajesa.20140204.12openalex-snapshot
Implementing Adaptive Time-Triggered Co-Operative Scheduling Framework for Highly-Predictable Embedded Systems
inferred← citeshttps://doi.org/10.1177/0142331207086183openalex-snapshot
Reducing the impact of task overruns in resource-constrained embedded systems in which a time-triggered software architecture is employed
inferred← citeshttps://doi.org/10.12691/jes-2-1-1openalex-snapshot
Estimating Message Latencies in Time-Triggered Shared-Clock Scheduling Protocols Built on CAN Network
inferred← citeshttps://doi.org/10.12691/jes-2-3-2openalex-snapshot
Studying the Impact of Scheduler Implementation on Task Jitter in Real-Time Resource-Constrained Embedded Systems
inferred← citeshttps://doi.org/10.12694/scpe.v2i1.117openalex-snapshot
On the distribution of control functions in new-generation on-board embedded real-time systems
inferred← citeshttps://doi.org/10.12694/scpe.v3i1.182openalex-snapshot
DynBench: A Benchmark Suite for Dynamic Real-Time Systems
inferred← citeshttps://doi.org/10.1680/aarots.20511.0014openalex-snapshot
14. The report
inferred← citeshttps://doi.org/10.20868/upm.thesis.39169openalex-snapshot
A framework for mixed-criticality partitioned real-time embedded systems
inferred← citeshttps://doi.org/10.21236/ada282657openalex-snapshot
On Predictable Operating System Protocol Processing
inferred← citeshttps://doi.org/10.21236/ada494322openalex-snapshot
The Golden Age of Software Architecture: A Comprehensive Survey
inferred← citeshttps://doi.org/10.2139/ssrn.6621919openalex-snapshot
Hard Real-Time Systems Scheduling Using Deep Reinforcement Learning
inferred← citeshttps://doi.org/10.22028/d291-25759openalex-snapshot
Formal methods for real-time requirements engineering
inferred← citeshttps://doi.org/10.24355/dbbs.084-200511080100-362openalex-snapshot
Compositional Scheduling Analysis Using Standard Event Models: the SymTA/S approach
inferred← citeshttps://doi.org/10.3182/20080706-5-kr-1001.01808openalex-snapshot
Control Performance Evaluation of Selected Methods of Feedback Scheduling of Real-time Control Tasks
inferred← citeshttps://doi.org/10.3233/978-1-58603-907-3-149openalex-snapshot
Shared-Clock Methodology for Time-Triggered Multi-Cores
inferred← citeshttps://doi.org/10.3233/emc-2005-00016openalex-snapshot
Control-scheduling codesign of real-time systems: The control server approach
inferred← citeshttps://doi.org/10.3390/a2041449openalex-snapshot
Exact and Heuristic Algorithms for Thrift Cyclic Scheduling
inferred← citeshttps://doi.org/10.3390/fi17060269openalex-snapshot
A C-Based Framework for Low-Cost Real-Time Embedded Systems
inferred← citeshttps://doi.org/10.4236/jsea.2011.47048openalex-snapshot
Employing Two ‘Sandwich Delay’ Mechanisms to Enhance Predictability of Embedded Systems Which Use Time-Triggered Co-Operative Architectures
inferred← citeshttps://doi.org/10.4995/riai.2022.17148openalex-snapshot
Planificación de sistemas de tiempo real crítico mediante técnicas no convencionales
inferred← citeshttps://doi.org/10.4995/thesis/10251/17743openalex-snapshot
EXTENSIONES AL LENGUAJE ADA Y A LOS SERVICIOS POSIX PARA PLANIFICACIÓN EN SISTEMAS DE TIEMPO REAL ESTRICTO.
inferred← citeshttps://doi.org/10.4995/thesis/10251/203212openalex-snapshot
Investigación de nuevas metodologías para la planificación de sistemas de tiempo real multinúcleo mediante técnicas no convencionales
inferred← citeshttps://doi.org/10.4995/thesis/10251/55328openalex-snapshot
Utilización de memorias cache con bloqueo en sistemas de tiempo real.
inferred← citeshttps://doi.org/10.5121/ijesa.2016.6201openalex-snapshot
Developing Scheduler Test Cases to Verify Scheduler Implementations In Time-Triggered Embedded Systems
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