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A new scheme for the deterministic simulation of PRAMs in VLSI

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/bf00264615openalex-snapshot
Randomized and deterministic simulations of PRAMs by parallel machines with restricted granularity of parallel memories
inferredcites →https://doi.org/10.1016/0020-0190(88)90160-3openalex-snapshot
A probabilistic simulation of prams on a bounded degree network
inferredcites →https://doi.org/10.1109/sfcs.1981.22openalex-snapshot
New lower bound techniques for VLSI
inferredcites →https://doi.org/10.1109/sfcs.1987.32openalex-snapshot
How to emulate shared memory
inferredcites →https://doi.org/10.1137/0216053openalex-snapshot
Deterministic Simulation of Idealized Parallel Computers on More Realistic Ones
inferredcites →https://doi.org/10.1145/12130.12146openalex-snapshot
Parallel hashing---an efficient implementation of shared memory
inferredcites →https://doi.org/10.1145/357114.357116openalex-snapshot
Ultracomputers
inferredcites →https://doi.org/10.1145/7531.7926openalex-snapshot
How to share memory in a distributed system
inferredcites →https://doi.org/10.1145/800057.808667openalex-snapshot
Tight bounds on the complexity of parallel sorting
inferredcites →https://doi.org/10.1145/800057.808689openalex-snapshot
A probabilistic relation between desirable and feasible, models of parallel computation
inferredcites →https://doi.org/10.1145/800061.808726openalex-snapshot
An 0(n log n) sorting network
inferredcites →https://doi.org/10.1145/800133.804339openalex-snapshot
Parallelism in random access machines

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/(sici)1096-9128(199703)9:3<163::aid-cpe244>3.0.co;2-5openalex-snapshot
A PRAM oriented programming system
inferred← citeshttps://doi.org/10.1006/jpdc.1996.1295openalex-snapshot
RCC-Full: An Effective Network for Parallel Computations
inferred← citeshttps://doi.org/10.1007/3-540-45591-4_18openalex-snapshot
A Hardware Implementation of PRAM and its Performance Evaluation
inferred← citeshttps://doi.org/10.1007/3-540-56503-5_14openalex-snapshot
An O(√n)-worst-case-time solution to the granularity problem
inferred← citeshttps://doi.org/10.1007/3-540-60084-1_89openalex-snapshot
Improved deterministic PRAM simulation on the mesh
inferred← citeshttps://doi.org/10.1007/978-1-4612-3352-7_2openalex-snapshot
Context-Dependent String Matching
inferred← citeshttps://doi.org/10.1007/978-3-642-80350-5_3openalex-snapshot
On Implementing EREW Work-Optimally on Mesh of Trees
inferred← citeshttps://doi.org/10.1007/bf01305311openalex-snapshot
Representing Shared Data on Distributed-Memory Parallel Computers
inferred← citeshttps://doi.org/10.1007/bf02679451openalex-snapshot
Practical Constructive Schemes for Deterministic Shared-Memory Access
inferred← citeshttps://doi.org/10.1007/bf02679461openalex-snapshot
The Complexity of Deterministic PRAM Simulation on Distributed Memory Machines
inferred← citeshttps://doi.org/10.1007/bfb0049425openalex-snapshot
Tight bounds on deterministic PRAM emulations with constant redundancy
inferred← citeshttps://doi.org/10.1007/s00224-008-9099-9openalex-snapshot
Towards a Scalable and Robust DHT
inferred← citeshttps://doi.org/10.1016/0890-5401(91)90021-sopenalex-snapshot
Deterministic P-RAM simulation with constant redundancy
inferred← citeshttps://doi.org/10.1023/a:1008103903338openalex-snapshot
Efficient Deterministic and Probabilistic Simulations of PRAMs on Linear Arrays with Reconfigurable Pipelined Bus Systems
inferred← citeshttps://doi.org/10.1109/13.544798openalex-snapshot
The II parallel programming system
inferred← citeshttps://doi.org/10.1109/empdp.1995.389141openalex-snapshot
A PRAM oriented language
inferred← citeshttps://doi.org/10.1109/iccl.1992.185466openalex-snapshot
Complexity issues in the design of functional languages with explicit parallelism
inferred← citeshttps://doi.org/10.1109/pmmp.1993.315542openalex-snapshot
On the implementation of virtual shared memory
inferred← citeshttps://doi.org/10.1109/spdp.1990.143532openalex-snapshot
Deterministic simulation of PRAMs on hypercube networks without look-up tables
inferred← citeshttps://doi.org/10.1109/wvl.1992.275789openalex-snapshot
Interactive animation of fault tolerant parallel algorithms
inferred← citeshttps://doi.org/10.1137/s0097539789164765openalex-snapshot
Deterministic Simulations of PRAM s on Bounded Degree Networks
inferred← citeshttps://doi.org/10.1137/s009753979732712xopenalex-snapshot
Constructive, Deterministic Implementation of Shared Memory on Meshes
inferred← citeshttps://doi.org/10.1142/s0129054103002230openalex-snapshot
A GENERAL PRAM SIMULATION SCHEME FOR CLUSTERED MACHINES
inferred← citeshttps://doi.org/10.1145/1148109.1148163openalex-snapshot
Towards a scalable and robust DHT
inferred← citeshttps://doi.org/10.1145/164996.165002openalex-snapshot
Parallel algorithms column 1
inferred← citeshttps://doi.org/10.1145/165231.165245openalex-snapshot
A practical constructive scheme for deterministic shared-memory access
inferred← citeshttps://doi.org/10.1145/176979.176984openalex-snapshot
A survey of PRAM simulation techniques
inferred← citeshttps://doi.org/10.1145/181014.181388openalex-snapshot
Constructive deterministic PRAM simulation on a mesh-connected computer
inferred← citeshttps://doi.org/10.1145/72935.72947openalex-snapshot
Deterministic P-RAM simulation with constant redundancy
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