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Planar circuits have short specifications

0 signed · 27 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/j.1538-7305.1949.tb03624.xopenalex-snapshot
The Synthesis of Two-Terminal Switching Circuits
inferredcites →https://doi.org/10.1002/sapm194221183openalex-snapshot
The Number of Two‐Terminal Series‐Parallel Networks
inferredcites →https://doi.org/10.1007/978-3-642-68402-9_8openalex-snapshot
Planar Circuit Complexity and The Performance of VLSI Algorithms +
inferredcites →https://doi.org/10.1007/bf01744431openalex-snapshot
Parity, circuits, and the polynomial-time hierarchy
inferredcites →https://doi.org/10.1007/bf02246615openalex-snapshot
Zwei lineare untere Schranken für die Komplexität Boolescher Funktionen
inferredcites →https://doi.org/10.1007/bfb0017292openalex-snapshot
Boolean functions whose monotone complexity is of size n2/log n
inferredcites →https://doi.org/10.1016/0020-0190(87)90180-3openalex-snapshot
The planar realization of Boolean functions
inferredcites →https://doi.org/10.1016/0304-3975(83)90029-4openalex-snapshot
A Boolean function requiring 3n network size
inferredcites →https://doi.org/10.1016/0304-3975(89)90084-4openalex-snapshot
Boolean functions whose monotone complexity is of size n2log n
inferredcites →https://doi.org/10.1016/0378-4754(79)90115-0openalex-snapshot
The complexity of computing
inferredcites →https://doi.org/10.1063/1.524313openalex-snapshot
A kernel of Gel’fand–Levitan type for the three-dimensional Schrödinger equation
inferredcites →https://doi.org/10.1109/tc.1979.1675245openalex-snapshot
The Complexity of Monotone Networks for Certain Bilinear Forms, Routing Problems, Sorting, and Merging
inferredcites →https://doi.org/10.1137/0206030openalex-snapshot
A $2.5n$-Lower Bound on the Combinational Complexity of Boolean Functions
inferredcites →https://doi.org/10.1137/0209046openalex-snapshot
Applications of a Planar Separator Theorem
inferredcites →https://doi.org/10.1137/0211033openalex-snapshot
$\Omega (n\log n)$ Lower Bounds on Length of Boolean Formulas
inferredcites →https://doi.org/10.4153/cjm-1962-002-9openalex-snapshot
A Census of Planar Triangulations

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/3-540-51498-8_45openalex-snapshot
On restricted Boolean circuits
inferred← citeshttps://doi.org/10.1007/3-540-54458-5_68openalex-snapshot
Nonlinear lower bounds on the number of processors of circuits with sublinear separators
inferred← citeshttps://doi.org/10.1007/3-540-55210-3_191openalex-snapshot
A nonlinear lower bound on the practical combinational complexity
inferred← citeshttps://doi.org/10.1007/bf01277954openalex-snapshot
On the complexity of planar Boolean circuits
inferred← citeshttps://doi.org/10.1007/bfb0023988openalex-snapshot
STACS 85
inferred← citeshttps://doi.org/10.1016/0020-0190(87)90180-3openalex-snapshot
The planar realization of Boolean functions
inferred← citeshttps://doi.org/10.1016/0304-3975(92)90079-uopenalex-snapshot
Lower bounds on the area complexity of Boolean circuits
inferred← citeshttps://doi.org/10.1016/0304-3975(94)00269-oopenalex-snapshot
A nonlinear lower bound on the practical combinational complexity
inferred← citeshttps://doi.org/10.1016/0890-5401(91)90041-yopenalex-snapshot
Nonlinear lower bounds on the number of processors of circuits with sublinear separators
inferred← citeshttps://doi.org/10.1364/ao.31.005568openalex-snapshot
Complexity analysis of optical-computing paradigms
inferred← citeshttps://doi.org/10.48550/arxiv.2103.07692openalex-snapshot
The complexity of multilayer $d$-dimensional circuits
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