On the public citation graph
The queue-read queue-write asynchronous PRAM model
0 signed · 39 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1016/b978-0-444-88071-0.50022-9openalex-snapshot
Parallel Algorithms for Shared-Memory Machines
inferredcites →https://doi.org/10.1016/s0022-0000(05)80003-0openalex-snapshot
Exact lower time bounds for computing Boolean functions on CREW PRAMs
inferredcites →https://doi.org/10.1016/s0304-3975(97)00193-xopenalex-snapshot
The queue-read queue-write asynchronous PRAM model
inferredcites →https://doi.org/10.1109/tc.1979.1675439openalex-snapshot
How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
inferredcites →https://doi.org/10.1109/tc.1983.1676201openalex-snapshot
The NYU Ultracomputer—Designing an MIMD Shared Memory Parallel Computer
inferredcites →https://doi.org/10.1137/0214030openalex-snapshot
Probabilistic Parallel Algorithms for Sorting and Selection
inferredcites →https://doi.org/10.1137/0221063openalex-snapshot
Work-Optimal Asynchronous Algorithms for Shared Memory Parallel Computers
inferredcites →https://doi.org/10.1137/s009753979427491openalex-snapshot
The Queue-Read Queue-Write PRAM Model: Accounting for Contention in Parallel Algorithms
inferredcites →https://doi.org/10.1142/s0129626496000248openalex-snapshot
DETERMINISTIC LEADER ELECTION ON THE ASYNCHRONOUS QRQW PRAM
inferredcites →https://doi.org/10.1145/113379.113406openalex-snapshot
Proving sequential consistency of high-performance shared memories (extended abstract)
inferredcites →https://doi.org/10.1145/140901.140922openalex-snapshot
Primitives for asynchronous list compression
inferredcites →https://doi.org/10.1145/140901.141895openalex-snapshot
Specifying non-blocking shared memories (extended abstract)
inferredcites →https://doi.org/10.1145/165231.165251openalex-snapshot
An atomic model for message-passing
inferredcites →https://doi.org/10.1145/167088.167145openalex-snapshot
Contention in shared memory algorithms
inferredcites →https://doi.org/10.1145/181014.181382openalex-snapshot
Efficient low-contention parallel algorithms
inferredcites →https://doi.org/10.1145/215399.215425openalex-snapshot
Accounting for memory bank contention and delay in high-bandwidth multiprocessors
inferredcites →https://doi.org/10.1145/237502.237506openalex-snapshot
Asynchronous shared memory search structures
inferredcites →https://doi.org/10.1145/285930.285997openalex-snapshot
Memory consistency and event ordering in scalable shared-memory multiprocessors
inferredcites →https://doi.org/10.1145/325096.325102openalex-snapshot
Memory consistency and event ordering in scalable shared-memory multiprocessors
inferredcites →https://doi.org/10.1145/72935.72954openalex-snapshot
The APRAM: incorporating asynchrony into the PRAM model
inferredcites →https://doi.org/10.1145/97444.97672openalex-snapshot
Asynchronous shared memory parallel computation
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/3-540-48518-x_3openalex-snapshot
Designing Practical Efficient Algorithms for Symmetric Multiprocessors
inferred← citeshttps://doi.org/10.1007/978-3-319-14325-5_15openalex-snapshot
An Empirical Evaluation of GPGPU Performance Models
inferred← citeshttps://doi.org/10.1007/bfb0058018openalex-snapshot
QSM: A general purpose shared-memory model for parallel computation
inferred← citeshttps://doi.org/10.1016/j.parco.2016.04.002openalex-snapshot
The landscape of GPGPU performance modeling tools
inferred← citeshttps://doi.org/10.1016/s0167-8191(01)00147-8openalex-snapshot
The parallel client–server paradigm
inferred← citeshttps://doi.org/10.1109/hipc.2009.5433179openalex-snapshot
A performance prediction model for the CUDA GPGPU platform
inferred← citeshttps://doi.org/10.1109/icppw.1996.538596openalex-snapshot
What good are shared-memory models?
inferred← citeshttps://doi.org/10.1145/3087801.3087828openalex-snapshot
Analyzing Contention and Backoff in Asynchronous Shared Memory
inferred← citeshttps://doi.org/10.1145/3329785.3329926openalex-snapshot
Accelerating the Unacceleratable
inferred← citeshttps://doi.org/10.1145/3412841.3441913openalex-snapshot
A study of work distribution and contention in database primitives on heterogeneous CPU/GPU architectures
inferred← citeshttps://doi.org/10.17760/d20317872openalex-snapshot
Multilevel interference-aware scheduling on modern GPUs
inferred← citeshttps://doi.org/10.48550/arxiv.1905.05254openalex-snapshot
Optimal Multithreaded Batch-Parallel 2-3 Trees
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.