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Deciding fixed and non-fixed size bit-vectors

https://doi.org/10.1007/bfb0054184
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-60045-0_38openalex-snapshot
Hardware verification using monadic second-order logic
inferredcites →https://doi.org/10.1007/3-540-61474-5_70openalex-snapshot
Deductive model checking
inferredcites →https://doi.org/10.1007/3-540-61474-5_92openalex-snapshot
STeP: Deductive-algorithmic verification of reactive and real-time systems
inferredcites →https://doi.org/10.1007/3-540-61511-3_107openalex-snapshot
On Shostak's decision procedure for combinations of theories
inferredcites →https://doi.org/10.1007/3-540-63104-6_13openalex-snapshot
A practical integration of first-order reasoning and decision procedures
inferredcites →https://doi.org/10.1007/3-540-63166-6_9openalex-snapshot
An efficient decision procedure for the theory of fixed-sized bit-vectors
inferredcites →https://doi.org/10.1093/oso/9780198537458.001.0001openalex-snapshot
Handbook of Logic in Artificial Intelligence and Logic Programming
inferredcites →https://doi.org/10.1109/tc.1986.1676819openalex-snapshot
Graph-Based Algorithms for Boolean Function Manipulation
inferredcites →https://doi.org/10.1145/217474.217583openalex-snapshot
Verification of arithmetic circuits with binary moment diagrams
inferredcites →https://doi.org/10.1145/2422.322411openalex-snapshot
Deciding Combinations of Theories
inferredcites →https://doi.org/10.1145/320764.320765openalex-snapshot
The Association for Computing Machinery
inferredcites →https://doi.org/10.1145/357073.357079openalex-snapshot
Simplification by Cooperating Decision Procedures
inferredcites →https://doi.org/10.1145/357162.357169openalex-snapshot
An Efficient Unification Algorithm
inferredcites →https://doi.org/10.1145/78935.78938openalex-snapshot
Minimal and complete word unification
inferredcites →https://doi.org/10.1145/800125.804029openalex-snapshot
Word problems requiring exponential time(Preliminary Report)
inferredcites →https://doi.org/10.2307/2311171openalex-snapshot
An Introduction to the Theory of Numbers.

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/1-4020-2530-0_4openalex-snapshot
Application of Property Checking and Underlying Techniques
inferred← citeshttps://doi.org/10.1007/3-540-44585-4_35openalex-snapshot
BOOSTER: Speeding Up RTL Property Checking of Digital Designs by Word-Level Abstraction
inferred← citeshttps://doi.org/10.1007/3-540-49519-3_4openalex-snapshot
Solving Bit-Vector Equations
inferred← citeshttps://doi.org/10.1007/978-3-030-29436-6_22openalex-snapshot
Towards Bit-Width-Independent Proofs in SMT Solvers
inferred← citeshttps://doi.org/10.1007/978-3-031-86695-1_4openalex-snapshot
PolySAT: Word-level Bit-vector Reasoning in Z3
inferred← citeshttps://doi.org/10.1007/978-3-319-10575-8_11openalex-snapshot
Satisfiability Modulo Theories
inferred← citeshttps://doi.org/10.1007/978-3-319-40970-2_16openalex-snapshot
Deciding Bit-Vector Formulas with mcSAT
inferred← citeshttps://doi.org/10.1007/978-3-642-38536-0_33openalex-snapshot
More on the Complexity of Quantifier-Free Fixed-Size Bit-Vector Logics with Binary Encoding
inferred← citeshttps://doi.org/10.1007/978-3-662-44465-8_41openalex-snapshot
On the Complexity of Symbolic Verification and Decision Problems in Bit-Vector Logic
inferred← citeshttps://doi.org/10.1007/978-3-7091-6355-9_13openalex-snapshot
An Update on STeP: Deductive-Algorithmic Verification of Reactive Systems
inferred← citeshttps://doi.org/10.1007/b105236openalex-snapshot
Advanced Formal Verification
inferred← citeshttps://doi.org/10.1007/s00224-015-9653-1openalex-snapshot
Complexity of Fixed-Size Bit-Vector Logics
inferred← citeshttps://doi.org/10.1007/s10703-016-0260-9openalex-snapshot
A layered algorithm for quantifier elimination from linear modular constraints
inferred← citeshttps://doi.org/10.1007/s10817-021-09598-9openalex-snapshot
Towards Satisfiability Modulo Parametric Bit-vectors
inferred← citeshttps://doi.org/10.1145/1687399.1687403openalex-snapshot
A scalable decision procedure for fixed-width bit-vectors
inferred← citeshttps://doi.org/10.14794/icai.10.2017.179openalex-snapshot
How Hard is Bit-Precise Reasoning?
inferred← citeshttps://doi.org/10.1609/aaai.v29i1.9372openalex-snapshot
Stochastic Local Search for Satisfiability Modulo Theories
inferred← citeshttps://doi.org/10.22028/d291-25942openalex-snapshot
Superposition and decision procedures back and forth
inferred← citeshttps://doi.org/10.2298/bg20131217vujosevicjanicicopenalex-snapshot
Automated generation and checking of verification conditions
inferred← citeshttps://doi.org/10.29007/cvnzopenalex-snapshot
On the Complexity of Fixed-Size Bit-Vector Logics with Binary Encoded Bit-Width
inferred← citeshttps://doi.org/10.7146/brics.v6i18.20075openalex-snapshot
Solving Bit-Vector Equations of Fixed and Non-Fixed Size
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