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Using SPIN to Analyse the Tree Identification Phase of the IEEE 1394 High-Performance Serial Bus (FireWire) Protocol
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/j.1538-7305.1990.tb00101.xopenalex-snapshot
Algorithms for Automated Protocol Verification
inferredcites →https://doi.org/10.1002/stvr.228openalex-snapshot
Software model checking: extracting verification models from source code†
inferredcites →https://doi.org/10.1007/10721959_19openalex-snapshot
Reducing Model Checking of the Many to the Few
inferredcites →https://doi.org/10.1007/3-540-44585-4_4openalex-snapshot
Automated Inductive Verification of Parameterized Protocols?
inferredcites →https://doi.org/10.1007/3-540-48234-2openalex-snapshot
Theoretical and Practical Aspects of SPIN Model Checking
inferredcites →https://doi.org/10.1007/3-540-48234-2_18openalex-snapshot
The Engineering of a Model Checker: the Gnu i-Protocol Case Study Revisited.
inferredcites →https://doi.org/10.1007/3-540-48234-2_4openalex-snapshot
Partial Order Reduction in Presence of Rendez-vous Communications with Unless Constructs and Weak Fairness
inferredcites →https://doi.org/10.1007/3-540-49646-7_22openalex-snapshot
Model Checking Safety Critical Software with SPIN: an Application to a Railway Interlocking System
inferredcites →https://doi.org/10.1007/3-540-52148-8_6openalex-snapshot
Verifying properties of large sets of processes with network invariants
inferredcites →https://doi.org/10.1007/3-540-55602-8_217openalex-snapshot
PVS: A prototype verification system
inferredcites →https://doi.org/10.1007/3-540-56922-7_40openalex-snapshot
A Structural linearization principle for processes
inferredcites →https://doi.org/10.1007/3-540-60218-6_30openalex-snapshot
Verifying parameterized networks using abstraction and regular languages
inferredcites →https://doi.org/10.1007/3-540-60761-7openalex-snapshot
Partial-Order Methods for the Verification of Concurrent Systems
inferredcites →https://doi.org/10.1007/3-540-61474-5_65openalex-snapshot
Verifying systems with replicated components in murϕ
inferredcites →https://doi.org/10.1007/978-0-387-34892-6_1openalex-snapshot
Simple On-the-fly Automatic Verification of Linear Temporal Logic
inferredcites →https://doi.org/10.1007/978-0-387-35578-8openalex-snapshot
Formal Methods for Protocol Engineering and Distributed Systems
inferredcites →https://doi.org/10.1007/bf00121262openalex-snapshot
Combining partial order reductions with on-the-fly model-checking
inferredcites →https://doi.org/10.1007/bf00625968openalex-snapshot
Better verification through symmetry
inferredcites →https://doi.org/10.1007/bf01383832openalex-snapshot
A structural linearization principle for processes
inferredcites →https://doi.org/10.1007/s100090050034openalex-snapshot
A minimized automaton representation of reachable states
inferredcites →https://doi.org/10.1007/s100090050041openalex-snapshot
Issues in slicing PROMELA and its applications to model checking, protocol understanding, and simulation
inferredcites →https://doi.org/10.1007/s100090050043openalex-snapshot
Model checking JAVA programs using JAVA PathFinder
inferredcites →https://doi.org/10.1007/s100090050045openalex-snapshot
Formalization and validation of the General Inter-ORB Protocol (GIOP) using PROMELA and SPIN
inferredcites →https://doi.org/10.1016/0020-0190(86)90071-2openalex-snapshot
Limits for automatic verification of finite-state concurrent systems
inferredcites →https://doi.org/10.1016/0169-7552(93)90095-lopenalex-snapshot
Design and validation of protocols: a tutorial
inferredcites →https://doi.org/10.1016/0306-4379(85)90015-8openalex-snapshot
The international federation for information processing
inferredcites →https://doi.org/10.1016/0890-5401(89)90026-6openalex-snapshot
Reasoning about networks with many identical finite state processes
inferredcites →https://doi.org/10.1016/s0022-0000(74)80051-6openalex-snapshot
Theories of automata on ω-tapes: A simplified approach
inferredcites →https://doi.org/10.1023/a:1008696026254openalex-snapshot
An Analysis of Bitstate Hashing
inferredcites →https://doi.org/10.1023/a:1008723125149openalex-snapshot
Verifying Systems with Replicated Components in Murϕ
inferredcites →https://doi.org/10.1090/dimacs/029/13openalex-snapshot
Partial order reduction: Linear and branching temporal logics and process algebras
inferredcites →https://doi.org/10.1090/dimacs/032/13openalex-snapshot
Memory efficient state storage in SPIN
inferredcites →https://doi.org/10.1108/ir.1999.04926fae.001openalex-snapshot
Lecture Notes in Computer Science 1205
inferredcites →https://doi.org/10.1109/lics.1998.705644openalex-snapshot
On model checking for non-deterministic infinite-state systems
inferredcites →https://doi.org/10.1145/146637.146681openalex-snapshot
Reasoning about systems with many processes
inferredcites →https://doi.org/10.1145/72981.72998openalex-snapshot
A structural induction theorem for processes
inferredcites →https://doi.org/10.21236/ada227320openalex-snapshot
Tools and Rules for the Practicing Verifier
inferredcites →https://doi.org/10.5555/380921.380935openalex-snapshot
Using SPIN for feature interaction analysis—a case study
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.3217/jucs-012-08-0981openalex-extracted
Variations on Itai-Rodeh Leader Election for Anonymous Rings and their Analysis in PRISM
inferred← citeshttps://doi.org/10.1007/s001650300001openalex-snapshot
IEEE 1394 Tree Identify Protocol: Introduction to the Case Study
inferred← citeshttps://doi.org/10.1007/s001650300003openalex-snapshot
Specification and Verification of the Tree Identify Protocol of IEEE 1394 in Rewriting Logic
inferred← citeshttps://doi.org/10.1007/s001650300005openalex-snapshot
Verifying the IEEE 1394 FireWire Tree Identify Protocol with SMV
inferred← citeshttps://doi.org/10.1016/j.entcs.2009.08.007openalex-snapshot
An Inductive Technique for Parameterised Model Checking of Degenerative Distributed Randomised Protocols
inferred← citeshttps://doi.org/10.1016/s0304-3975(01)00357-7openalex-snapshot
Rewriting logic: roadmap and bibliography
inferred← citeshttps://doi.org/10.1109/jsac.2010.101009openalex-snapshot
Evolving the Internet Architecture Through Naming
inferred← citeshttps://doi.org/10.1109/rtc.2005.1547535openalex-snapshot
A review of technologies for the transport of digital data in recent physics experiments
inferred← citeshttps://doi.org/10.15589/znp2020.1(479).10openalex-snapshot
A SURVEY OF PARAMETRIC MODEL VERIFICATION METHODS
inferred← citeshttps://doi.org/10.2200/s00658ed1v01y201508dct013openalex-snapshot
Decidability of Parameterized Verification
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