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Finding and fixing faults
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/0-387-31005-3openalex-snapshot
Logic Synthesis and Verification Algorithms
inferredcites →https://doi.org/10.1007/10722167_21openalex-snapshot
Efficient Büchi Automata from LTL Formulae
inferredcites →https://doi.org/10.1007/11795490_22openalex-snapshot
Revising UNITY Programs: Possibilities and Limitations
inferredcites →https://doi.org/10.1007/11817963_33openalex-snapshot
Repair of Boolean Programs with an Application to C
inferredcites →https://doi.org/10.1007/3-540-40922-xopenalex-snapshot
Formal Methods in Computer-Aided Design
inferredcites →https://doi.org/10.1007/3-540-40922-x_10openalex-snapshot
A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles
inferredcites →https://doi.org/10.1007/3-540-44829-2_8openalex-snapshot
What Went Wrong: Explaining Counterexamples
inferredcites →https://doi.org/10.1007/3-540-59042-0_57openalex-snapshot
On the synthesis of strategies in infinite games
inferredcites →https://doi.org/10.1007/3-540-60045-0_56openalex-snapshot
An automata-theoretic approach to fair realizability and synthesis
inferredcites →https://doi.org/10.1007/3-540-60385-9_11openalex-snapshot
Design error diagnosis in sequential circuits
inferredcites →https://doi.org/10.1007/3-540-61474-5_95openalex-snapshot
VIS: A system for verification and synthesis
inferredcites →https://doi.org/10.1007/978-0-387-34892-6_1openalex-snapshot
Simple On-the-fly Automatic Verification of Linear Temporal Logic
inferredcites →https://doi.org/10.1007/978-1-4612-4792-0_13openalex-snapshot
Theorist: A Logical Reasoning System for Defaults and Diagnosis
inferredcites →https://doi.org/10.1007/978-1-4615-0292-0_2openalex-snapshot
Automating the Diagnosis and the Rectification of Design Errors with PRIAM
inferredcites →https://doi.org/10.1007/978-3-540-24730-2_15openalex-snapshot
A Tool for Checking ANSI-C Programs
inferredcites →https://doi.org/10.1007/978-3-540-24730-2_3openalex-snapshot
Minimal Assignments for Bounded Model Checking
inferredcites →https://doi.org/10.1007/978-3-540-39724-3_12openalex-snapshot
“More Deterministic” vs. “Smaller” Büchi Automata for Efficient LTL Model Checking
inferredcites →https://doi.org/10.1007/978-3-540-70889-6_4openalex-snapshot
Automatic Fault Localization for Property Checking
inferredcites →https://doi.org/10.1007/978-3-540-72788-0_34openalex-snapshot
Fault Localization and Correction with QBF
inferredcites →https://doi.org/10.1007/978-3-540-73368-3_29openalex-snapshot
Anzu: A Tool for Property Synthesis
inferredcites →https://doi.org/10.1007/b117060openalex-snapshot
Logic Synthesis and Verification Algorithms
inferredcites →https://doi.org/10.1007/bfb0019402openalex-snapshot
Model-based diagnosis meets error diagnosis in logic programs
inferredcites →https://doi.org/10.1007/s10009-004-0146-9openalex-snapshot
Fate and free will in error traces
inferredcites →https://doi.org/10.1007/s10009-005-0202-0openalex-snapshot
Error explanation with distance metrics
inferredcites →https://doi.org/10.1007/s10664-005-3861-2openalex-snapshot
Supporting Controlled Experimentation with Testing Techniques: An Infrastructure and its Potential Impact
inferredcites →https://doi.org/10.1007/s10703-006-4341-zopenalex-snapshot
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
inferredcites →https://doi.org/10.1016/0004-3702(87)90062-2openalex-snapshot
A theory of diagnosis from first principles
inferredcites →https://doi.org/10.1016/0004-3702(87)90063-4openalex-snapshot
Diagnosing multiple faults
inferredcites →https://doi.org/10.1016/0020-0190(81)90106-xopenalex-snapshot
Myths about the mutual exclusion problem
inferredcites →https://doi.org/10.1016/0020-0255(88)90001-1openalex-snapshot
On observability of discrete-event systems
inferredcites →https://doi.org/10.1016/0169-7552(85)90019-4openalex-snapshot
Protocol specification, testing and verification
inferredcites →https://doi.org/10.1016/0304-3975(80)90009-2openalex-snapshot
The directed subgraph homeomorphism problem
inferredcites →https://doi.org/10.1016/j.entcs.2006.12.032openalex-snapshot
Automated Fault Localization for C Programs
inferredcites →https://doi.org/10.1016/j.entcs.2007.09.004openalex-snapshot
Specify, Compile, Run: Hardware from PSL
inferredcites →https://doi.org/10.1016/s0004-3702(99)00034-xopenalex-snapshot
Model-based diagnosis of hardware designs
inferredcites →https://doi.org/10.1016/s0004-3702(99)00039-9openalex-snapshot
Enhancing model checking in verification by AI techniques
inferredcites →https://doi.org/10.1016/s1571-0661(04)00261-0openalex-snapshot
Trail-Directed Model Checking
inferredcites →https://doi.org/10.1109/32.908957openalex-snapshot
Dynamically discovering likely program invariants to support program evolution
inferredcites →https://doi.org/10.1109/32.988498openalex-snapshot
Simplifying and isolating failure-inducing input
inferredcites →https://doi.org/10.1109/5.21072openalex-snapshot
The control of discrete event systems
inferredcites →https://doi.org/10.1109/92.311641openalex-snapshot
Logic design error diagnosis and correction
inferredcites →https://doi.org/10.1109/ase.2003.1240292openalex-snapshot
Fault localization with nearest neighbor queries
inferredcites →https://doi.org/10.1109/aspdac.2007.358111openalex-snapshot
Fixing Design Errors with Counterexamples and Resynthesis
inferredcites →https://doi.org/10.1109/date.2007.364456openalex-snapshot
Automatic Hardware Synthesis from Specifications: A Case Study
inferredcites →https://doi.org/10.1109/fmcad.2006.22openalex-snapshot
Optimizations for LTL Synthesis
inferredcites →https://doi.org/10.1109/iccad.1989.76898openalex-snapshot
Automating the diagnosis and the rectification of design errors with PRIAM
inferredcites →https://doi.org/10.1109/iccad.1990.129954openalex-snapshot
Efficient automatic diagnosis of digital circuits
inferredcites →https://doi.org/10.1109/iccad.2004.1382572openalex-snapshot
Debugging sequential circuits using Boolean satisfiability
inferredcites →https://doi.org/10.1109/lics.1998.705645openalex-snapshot
Freedom, weakness, and determinism: from linear-time to branching-time
inferredcites →https://doi.org/10.1109/lics.2001.932505openalex-snapshot
Deterministic generators and games for LTL fragments
inferredcites →https://doi.org/10.1109/mdt.2006.5openalex-snapshot
Automated source-level error localization in hardware designs
inferredcites →https://doi.org/10.1109/sfcs.1983.51openalex-snapshot
Reasoning about infinite computation paths
inferredcites →https://doi.org/10.1109/sfcs.2000.892332openalex-snapshot
The common fragment of CTL and LTL
inferredcites →https://doi.org/10.1111/j.1467-8640.1991.tb00388.xopenalex-snapshot
A spectrum of logical definitions of model‐based diagnosis1
inferredcites →https://doi.org/10.1145/1168857.1168907openalex-snapshot
Combinatorial sketching for finite programs
inferredcites →https://doi.org/10.1145/157485.164888openalex-snapshot
Reducing BDD size by exploiting functional dependencies
inferredcites →https://doi.org/10.1145/196244.196356openalex-snapshot
Rectification of multiple logic design errors in multiple output circuits
inferredcites →https://doi.org/10.1145/217474.217565openalex-snapshot
Efficient generation of counterexamples and witnesses in symbolic model checking
inferredcites →https://doi.org/10.1145/318593.318622openalex-snapshot
Checking that finite state concurrent programs satisfy their linear specification
inferredcites →https://doi.org/10.1145/587051.587053openalex-snapshot
Isolating cause-effect chains from computer programs
inferredcites →https://doi.org/10.1145/75277.75293openalex-snapshot
On the synthesis of a reactive module
inferredcites →https://doi.org/10.1145/963927.963928openalex-snapshot
Deterministic generators and games for Ltl fragments
inferredcites →https://doi.org/10.5555/1266366.1266622openalex-snapshot
Interactive presentation: Automatic hardware synthesis from specifications: a case study
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-032-32537-2_10openalex-snapshot
Consistency-Based Software Diagnosis: Accuracy, Scalability, and Limitations
inferred← citeshttps://doi.org/10.1007/978-3-319-07602-7_11openalex-snapshot
A General Trace-Based Framework of Logical Causality
inferred← citeshttps://doi.org/10.1007/978-3-319-10575-8_27openalex-snapshot
Graph Games and Reactive Synthesis
inferred← citeshttps://doi.org/10.1007/978-3-319-10575-8_31openalex-snapshot
Symbolic Model Checking in Non-Boolean Domains
inferred← citeshttps://doi.org/10.1007/978-3-319-15201-1_9openalex-snapshot
A Contracts-Based Framework for Systems Modeling and Embedded Diagnostics
inferred← citeshttps://doi.org/10.1007/978-3-319-21668-3_13openalex-snapshot
Deductive Program Repair
inferred← citeshttps://doi.org/10.1007/978-3-319-24953-7_20openalex-snapshot
Trace Diagnostics Using Temporal Implicants
inferred← citeshttps://doi.org/10.1007/978-3-319-26287-1_16openalex-snapshot
FudgeFactor: Syntax-Guided Synthesis for Accurate RTL Error Localization and Correction
inferred← citeshttps://doi.org/10.1007/978-3-319-52234-0_4openalex-snapshot
Synthesizing Non-Vacuous Systems
inferred← citeshttps://doi.org/10.1007/978-3-642-34188-5_6openalex-snapshot
Generalized Reactivity(1) Synthesis without a Monolithic Strategy
inferred← citeshttps://doi.org/10.1007/978-3-642-39611-3_11openalex-snapshot
Repair with On-The-Fly Program Analysis
inferred← citeshttps://doi.org/10.1007/978-3-642-39799-8_64openalex-snapshot
Program Repair without Regret
inferred← citeshttps://doi.org/10.1007/978-3-662-46681-0_50openalex-snapshot
Assume-Guarantee Synthesis for Concurrent Reactive Programs with Partial Information
inferred← citeshttps://doi.org/10.1007/978-3-662-49122-5_24openalex-snapshot
A General Modular Synthesis Problem for Pushdown Systems
inferred← citeshttps://doi.org/10.1007/s10009-012-0232-3openalex-snapshot
Abstraction-guided synthesis of synchronization
inferred← citeshttps://doi.org/10.1007/s10703-015-0223-6openalex-snapshot
Program repair without regret
inferred← citeshttps://doi.org/10.1016/j.artint.2014.02.005openalex-snapshot
CTL update of Kripke models through protections
inferred← citeshttps://doi.org/10.1016/j.scico.2015.06.010openalex-snapshot
A general framework for blaming in component-based systems
inferred← citeshttps://doi.org/10.1016/j.tcs.2012.07.031openalex-snapshot
A game-theoretic approach to fault diagnosis and identification of hybrid systems
inferred← citeshttps://doi.org/10.1109/ddecs.2013.6549789openalex-snapshot
Debugging HDL designs based on functional equivalences with high-level specifications
inferred← citeshttps://doi.org/10.1109/fmcad.2014.6987592openalex-snapshot
SAT-based methods for circuit synthesis
inferred← citeshttps://doi.org/10.1109/icsess.2013.6615284openalex-snapshot
Hidden Markov model based automated fault localization for integration testing
inferred← citeshttps://doi.org/10.1109/saner.2015.7081847openalex-snapshot
Identifying the exact fixing actions of static rule violation
inferred← citeshttps://doi.org/10.1109/sp46214.2022.9833567openalex-snapshot
PGPatch: Policy-Guided Logic Bug Patching for Robotic Vehicles
inferred← citeshttps://doi.org/10.1109/tse.2014.2312918openalex-snapshot
Automated Fixing of Programs with Contracts
inferred← citeshttps://doi.org/10.1145/1706299.1706338openalex-snapshot
Abstraction-guided synthesis of synchronization
inferred← citeshttps://doi.org/10.1145/1707801.1706338openalex-snapshot
Abstraction-guided synthesis of synchronization
inferred← citeshttps://doi.org/10.1145/2656045.2656048openalex-snapshot
Blaming in component-based real-time systems
inferred← citeshttps://doi.org/10.1145/2993422.2993426openalex-snapshot
Systematically Debugging IoT Control System Correctness for Building Automation
inferred← citeshttps://doi.org/10.22028/d291-26587openalex-snapshot
Synthesis and control of infinite-state systems with partial observability
inferred← citeshttps://doi.org/10.4204/eptcs.54.17openalex-snapshot
A Game-Theoretic approach to Fault Diagnosis of Hybrid Systems
inferred← citeshttps://doi.org/10.48550/arxiv.1604.06204openalex-snapshot
Satisfiability-Based Methods for Reactive Synthesis from Safety Specifications
inferred← citeshttps://doi.org/10.5555/2157654.2157671openalex-snapshot
Automated error localization and correction for imperative programs
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