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Single-Readout High-Density Memristor Crossbar
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/9780470891179openalex-snapshot
CMOS Circuit Design, Layout, and Simulation
inferredcites →https://doi.org/10.1016/j.mejo.2012.10.001openalex-snapshot
Memristor-based memory: The sneak paths problem and solutions
inferredcites →https://doi.org/10.1021/nl1017157openalex-snapshot
Self-Aligned Memristor Cross-Point Arrays Fabricated with One Nanoimprint Lithography Step
inferredcites →https://doi.org/10.1021/nl8037689openalex-snapshot
High-Density Crossbar Arrays Based on a Si Memristive System
inferredcites →https://doi.org/10.1021/nl904092hopenalex-snapshot
Nanoscale Memristor Device as Synapse in Neuromorphic Systems
inferredcites →https://doi.org/10.1038/nature14441openalex-snapshot
Training and operation of an integrated neuromorphic network based on metal-oxide memristors
inferredcites →https://doi.org/10.1038/ncomms4990openalex-snapshot
Resistive switching and its suppression in Pt/Nb:SrTiO3 junctions
inferredcites →https://doi.org/10.1038/nmat2748openalex-snapshot
Complementary resistive switches for passive nanocrossbar memories
inferredcites →https://doi.org/10.1038/srep02856openalex-snapshot
Ag/GeSx/Pt-based complementary resistive switches for hybrid CMOS/Nanoelectronic logic and memory architectures
inferredcites →https://doi.org/10.1038/srep04196openalex-snapshot
Tunnel conductivity switching in a single nanoparticle-based nano floating gate memory
inferredcites →https://doi.org/10.1038/srep04755openalex-snapshot
Enabling an Integrated Rate-temporal Learning Scheme on Memristor
inferredcites →https://doi.org/10.1038/srep04906openalex-snapshot
Activity-Dependent Synaptic Plasticity of a Chalcogenide Electronic Synapse for Neuromorphic Systems
inferredcites →https://doi.org/10.1038/srep07844openalex-snapshot
Dual Conical Conducting Filament Model in Resistance Switching TiO2 Thin Films
inferredcites →https://doi.org/10.1038/srep09229openalex-snapshot
Anatomy of vertical heteroepitaxial interfaces reveals the memristive mechanism in Nb2O5-NaNbO3 thin films
inferredcites →https://doi.org/10.1038/srep10123openalex-snapshot
Electronic system with memristive synapses for pattern recognition
inferredcites →https://doi.org/10.1063/1.3524521openalex-snapshot
High switching endurance in TaOx memristive devices
inferredcites →https://doi.org/10.1063/1.3693392openalex-snapshot
Engineering nonlinearity into memristors for passive crossbar applications
inferredcites →https://doi.org/10.1088/0957-4484/20/42/425204openalex-snapshot
Writing to and reading from a nano-scale crossbar memory based on memristors
inferredcites →https://doi.org/10.1109/aspdac.2015.7059067openalex-snapshot
Toward large-scale access-transistor-free memristive crossbars
inferredcites →https://doi.org/10.1109/cnna.2014.6888656openalex-snapshot
Memristor based crossbar memory array sneak path estimation
inferredcites →https://doi.org/10.1109/jproc.2011.2158284openalex-snapshot
Memristors With Flexible Electronic Applications
inferredcites →https://doi.org/10.1109/ted.2014.2310200openalex-snapshot
Crossbar RRAM Arrays: Selector Device Requirements During Read Operation
inferredcites →https://doi.org/10.1109/tnano.2014.2299558openalex-snapshot
Memristor Multiport Readout: A Closed-Form Solution for Sneak Paths
inferredcites →https://doi.org/10.1109/tnano.2014.2363352openalex-snapshot
Compensated Readout for High-Density MOS-Gated Memristor Crossbar Array
inferredcites →https://doi.org/10.1109/tnano.2015.2394450openalex-snapshot
Novel Complementary Resistive Switch Crossbar Memory Write and Read Schemes
inferredcites →https://doi.org/10.1109/tvlsi.2010.2049867openalex-snapshot
Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines
inferredcites →https://doi.org/10.1145/1785481.1785548openalex-snapshot
Design considerations for variation tolerant multilevel CMOS/Nano memristor memory
inferredcites →https://doi.org/10.1145/2160916.2160925openalex-snapshot
3D CMOS-memristor hybrid circuits
inferredcites →https://doi.org/10.1145/2422094.2422103openalex-snapshot
Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.2139/ssrn.4473721openalex-extracted
High Speed Readout Techniques for High Density Non-Volatile Memristor Crossbar Memory with Suppressed Sneak-Path Current
inferred← citeshttps://doi.org/10.1002/adfm.202305869openalex-snapshot
Unidirectional Neuromorphic Resistive Memory Integrated with Piezoelectric Nanogenerator for Self‐Power Electronics
inferred← citeshttps://doi.org/10.1002/adma.201601603openalex-snapshot
3D Arrays of 1024‐Pixel Image Sensors based on Lead Halide Perovskite Nanowires
inferred← citeshttps://doi.org/10.1002/admt.202400895openalex-snapshot
Self‐Rectifying Short‐Term Memory Phenomena Through Integration of TiOx Oxygen Reservoir and Al 2 O 3 Barrier Layers for Neuromorphic System
inferred← citeshttps://doi.org/10.1002/advs.75742openalex-snapshot
Neuromorphic Near‐Sensor and In‐Sensor Computing Enabled by Next‐Generation Material‐Based Sensors
inferred← citeshttps://doi.org/10.1002/aelm.70558openalex-snapshot
Strategies and Challenges in Memristor‐Selector Integration for High‐Density Memory and Compute‐in‐Memory Systems
inferred← citeshttps://doi.org/10.1002/aisy.202000127openalex-snapshot
Application of Memristors in Hardware Security: A Current State‐of‐the‐Art Technology
inferred← citeshttps://doi.org/10.1007/978-3-030-42424-4_2openalex-snapshot
Memristive Computing Devices and Applications
inferred← citeshttps://doi.org/10.1007/978-3-030-79492-7_1openalex-snapshot
Memristive Devices and Circuits
inferred← citeshttps://doi.org/10.1007/978-981-96-0332-9_6openalex-snapshot
Memristor Network-Based Swarm Intelligence
inferred← citeshttps://doi.org/10.1007/s10832-017-0103-0openalex-snapshot
Memristive computing devices and applications
inferred← citeshttps://doi.org/10.1007/s11063-019-10179-6openalex-snapshot
Memristor Crossbar Array Based ACO For Image Edge Detection
inferred← citeshttps://doi.org/10.1007/s11664-018-6730-7openalex-snapshot
Realizing Bidirectional Threshold Switching in Ag/Ta2O5/Pt Diffusive Devices for Selector Applications
inferred← citeshttps://doi.org/10.1016/b978-0-08-102782-0.00018-6openalex-snapshot
System-level integration in neuromorphic co-processors
inferred← citeshttps://doi.org/10.1016/j.jallcom.2020.158027openalex-snapshot
Solution-processed oxide semiconductor-based artificial optoelectronic synapse array for spatiotemporal synaptic integration
inferred← citeshttps://doi.org/10.1016/j.matt.2020.01.011openalex-snapshot
Highly Reliable Low-Voltage Memristive Switching and Artificial Synapse Enabled by van der Waals Integration
inferred← citeshttps://doi.org/10.1016/j.mejo.2016.05.007openalex-snapshot
Pilot assisted readout for passive memristor crossbars
inferred← citeshttps://doi.org/10.1016/j.mejo.2017.08.007openalex-snapshot
Adaptive and optimum multiport readout of non-gated crossbar memory arrays
inferred← citeshttps://doi.org/10.1016/j.sse.2017.03.006openalex-snapshot
Stacked resistive switches for AND/OR logic gates
inferred← citeshttps://doi.org/10.1038/s41598-023-33004-6openalex-snapshot
Performance analysis of DNA crossbar arrays for high-density memory storage applications
inferred← citeshttps://doi.org/10.1038/s41928-017-0006-8openalex-snapshot
The future of electronics based on memristive systems
inferred← citeshttps://doi.org/10.1038/s41928-018-0123-zopenalex-snapshot
Memristors divide to conquer device variability
inferred← citeshttps://doi.org/10.1038/s41928-020-0405-0openalex-snapshot
Low-power linear computation using nonlinear ferroelectric tunnel junction memristors
inferred← citeshttps://doi.org/10.1088/0957-4484/27/48/485201openalex-snapshot
A crossbar resistance switching memory readout scheme with sneak current cancellation based on a two-port current-mode sensing
inferred← citeshttps://doi.org/10.1109/cicc.2018.8357066openalex-snapshot
RRAM fabric for neuromorphic and reconfigurable compute-in-memory systems
inferred← citeshttps://doi.org/10.1109/cicc.2019.8780185openalex-snapshot
RRAM fabric for neuromorphic and reconfigurable compute-in-memory systems
inferred← citeshttps://doi.org/10.1109/ciss.2016.7460486openalex-snapshot
Channel equalization techniques for non-volatile memristor memories
inferred← citeshttps://doi.org/10.1109/dcna56428.2022.9923302openalex-snapshot
Possibilities and Limitations of Memristor Crossbars for Neuromorphic Computing
inferred← citeshttps://doi.org/10.1109/globecom38437.2019.9014026openalex-snapshot
Non-Stationary Polar Codes for Resistive Memories
inferred← citeshttps://doi.org/10.1109/icc.2017.7996547openalex-snapshot
Detection and coding schemes for parallel interference in resistive memories
inferred← citeshttps://doi.org/10.1109/mwscas.2017.8052863openalex-snapshot
On one step row readout technique of selector-less resistive arrays
inferred← citeshttps://doi.org/10.1109/nano58406.2023.10231189openalex-snapshot
Analog Memristor Counter Arrays
inferred← citeshttps://doi.org/10.1109/ssd.2017.8167029openalex-snapshot
Hardware emulation of Memristor based Ternary Content Addressable Memory
inferred← citeshttps://doi.org/10.1109/tcad.2017.2753204openalex-snapshot
A Novel Design for Memristor-Based Multiplexer Via NOT-Material Implication
inferred← citeshttps://doi.org/10.1109/tcad.2019.2927520openalex-snapshot
A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches
inferred← citeshttps://doi.org/10.1109/tcomm.2019.2897762openalex-snapshot
Detection and Coding Schemes for Sneak-Path Interference in Resistive Memory Arrays
inferred← citeshttps://doi.org/10.1109/tcomm.2022.3156074openalex-snapshot
Belief Propagation Based Joint Detection and Decoding for Resistive Random Access Memories
inferred← citeshttps://doi.org/10.1109/tcsi.2021.3079980openalex-snapshot
Analog Neural Computing With Super-Resolution Memristor Crossbars
inferred← citeshttps://doi.org/10.1109/tetci.2018.2829924openalex-snapshot
An All-Memristor Deep Spiking Neural Computing System: A Step Toward Realizing the Low-Power Stochastic Brain
inferred← citeshttps://doi.org/10.1109/tmscs.2017.2721160openalex-snapshot
Field-Programmable Crossbar Array (FPCA) for Reconfigurable Computing
inferred← citeshttps://doi.org/10.1109/tnano.2017.2784364openalex-snapshot
Parasitic Effect Analysis in Memristor-Array-Based Neuromorphic Systems
inferred← citeshttps://doi.org/10.1109/tnano.2018.2881109openalex-snapshot
A Resistive Random Access Memory Addon for the NCSU FreePDK 45 nm
inferred← citeshttps://doi.org/10.1109/tvlsi.2018.2835572openalex-snapshot
Memristor-Based Hardware Accelerator for Image Compression
inferred← citeshttps://doi.org/10.1142/s0218126621200024openalex-snapshot
SPICE Behavioral Modeling of TiO2 Memristors for Digital Logic Applications
inferred← citeshttps://doi.org/10.1145/3012002openalex-snapshot
One-Step Sneak-Path Free Read Scheme for Resistive Crossbar Memory
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