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Design and evaluation of a memristor‐based look‐up table for non‐volatile field programmable gate arrays
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1038/nmat2023openalex-snapshot
Nanoionics-based resistive switching memories
inferredcites →https://doi.org/10.1038/nnano.2008.160openalex-snapshot
Memristive switching mechanism for metal/oxide/metal nanodevices
inferredcites →https://doi.org/10.1109/ats.2011.66openalex-snapshot
On Defect Oriented Testing for Hybrid CMOS/Memristor Memory
inferredcites →https://doi.org/10.1109/date.2011.5763125openalex-snapshot
Design implications of memristor-based RRAM cross-point structures
inferredcites →https://doi.org/10.1109/fpl.2010.80openalex-snapshot
High Density Asynchronous LUT Based on Non-volatile MRAM Technology
inferredcites →https://doi.org/10.1109/mwscas.2007.4488809openalex-snapshot
Analysis of subthreshold leakage reduction in CMOS digital circuits
inferredcites →https://doi.org/10.1109/nano.2013.6720802openalex-snapshot
On the operational features and performance of a memristor-based cell for a LUT of an FPGA
inferredcites →https://doi.org/10.1109/nanoarch.2011.5941476openalex-snapshot
mrFPGA: A novel FPGA architecture with memristor-based reconfiguration
inferredcites →https://doi.org/10.1109/nems.2014.6908847openalex-snapshot
A memristor-based LUT for FPGAs
inferredcites →https://doi.org/10.1109/tc.2013.34openalex-snapshot
Scalable Application-Dependent Diagnosisof Interconnects of SRAM-Based FPGAs
inferredcites →https://doi.org/10.1109/tcsi.2010.2078710openalex-snapshot
Dynamical Properties and Design Analysis for Nonvolatile Memristor Memories
inferredcites →https://doi.org/10.1109/tct.1971.1083337openalex-snapshot
Memristor-The missing circuit element
inferredcites →https://doi.org/10.1109/tmag.2009.2024163openalex-snapshot
After Hard Drives—What Comes Next?
inferredcites →https://doi.org/10.1145/1596543.1596548openalex-snapshot
Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit
inferredcites →https://doi.org/10.1145/2765491.2765510openalex-snapshot
RRAM-based FPGA for "normally off, instantly on" applications
inferredcites →https://doi.org/10.1147/rd.524.0449openalex-snapshot
Overview of candidate device technologies for storage-class memory
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.2139/ssrn.4683860openalex-extracted
A Logic Device Based on Memristor-Diode Crossbar and Cmos Periphery
inferred← citeshttps://doi.org/10.1007/978-981-10-4235-5_8openalex-snapshot
An Overview on Memristor-Based Non-volatile LUT of an FPGA
inferred← citeshttps://doi.org/10.1007/978-981-19-2281-7_54openalex-snapshot
Low Energy Reduction Technique via Memristor for Wireless Body Sensors
inferred← citeshttps://doi.org/10.1007/s00034-023-02500-5openalex-snapshot
A Single MOS-Memristor Emulator Circuit
inferred← citeshttps://doi.org/10.1007/s10470-023-02221-4openalex-snapshot
A floating memristor emulator for analog and digital applications with experimental results
inferred← citeshttps://doi.org/10.1007/s10825-021-01697-5openalex-snapshot
New tunable resistorless grounded meminductor emulator
inferred← citeshttps://doi.org/10.1007/s11063-018-9853-1openalex-snapshot
Impact Analysis of the Memristor Failure on Real-Time Control System of Robotic Arm
inferred← citeshttps://doi.org/10.1016/j.chaos.2024.115964openalex-snapshot
A high-frequency compact memristor emulator circuit and its applications as wave shaping and generation circuit
inferred← citeshttps://doi.org/10.1016/j.ijleo.2017.09.011openalex-snapshot
Simplest memristive system
inferred← citeshttps://doi.org/10.1016/j.mejo.2019.104616openalex-snapshot
Electrical model of multi-level bipolar Ta2O5/TaOx Bi-layered ReRAM
inferred← citeshttps://doi.org/10.1016/j.memori.2026.100146openalex-snapshot
Exploring mem-element emulators: A review
inferred← citeshttps://doi.org/10.1016/j.vlsi.2024.102203openalex-snapshot
A logic device based on memristor-diode crossbar and CMOS periphery as spike router for hardware neural network
inferred← citeshttps://doi.org/10.1049/iet-cds.2016.0432openalex-snapshot
Improvement of two‐step write scheme in complementary resistive switch array
inferred← citeshttps://doi.org/10.1049/iet-cds.2018.5090openalex-snapshot
Novel design for Memristor‐based n to 1 multiplexer using new IMPLY logic approach
inferred← citeshttps://doi.org/10.1049/iet-cds.2019.0480openalex-snapshot
Analytical modelling of tantalum/titanium oxide‐based multi‐layer selector to eliminate sneak path current in RRAM arrays
inferred← citeshttps://doi.org/10.1063/1.5004001openalex-snapshot
Coexisting multiple attractors and riddled basins of a memristive system
inferred← citeshttps://doi.org/10.1088/1361-6641/abaa59openalex-snapshot
Multilevel memristive non-volatile look-up table using two transmission gates one memristor memory cells
inferred← citeshttps://doi.org/10.1088/1361-6641/ac6903openalex-snapshot
Low energy non-volatile look-up table using 2 bit ReRAM for field programmable gate array
inferred← citeshttps://doi.org/10.1088/1742-6596/1172/1/012104openalex-snapshot
Design of Memcapacitor Emulator using DVCCTA
inferred← citeshttps://doi.org/10.1109/access.2019.2914938openalex-snapshot
Parasitic Memcapacitor Effects on HP TiO 2 Memristor Dynamics
inferred← citeshttps://doi.org/10.1109/conecct55679.2022.9865831openalex-snapshot
A Passive Grounded MOSCAP- Memrisor Emulator
inferred← citeshttps://doi.org/10.1109/dicct61038.2024.10533143openalex-snapshot
A Passive Floating C-MOS Memristor with Analog Applications
inferred← citeshttps://doi.org/10.1109/icsc56524.2022.10009249openalex-snapshot
Single DXCCTA based Charge Controlled Floating Incremental/Decremental Memristor Emulator
inferred← citeshttps://doi.org/10.1109/impact55510.2022.10029225openalex-snapshot
A Grounded Flux Controlled Incremental/Decremental Memristor Emulator
inferred← citeshttps://doi.org/10.1109/isiea61920.2024.10607177openalex-snapshot
Programming Strategies for Memristor Crossbar Arrays
inferred← citeshttps://doi.org/10.1109/nvmsa.2018.00029openalex-snapshot
Multifilamentary Conduction Modelling of Bipolar Ta2O5/TaOx Bi-Layered RRAM
inferred← citeshttps://doi.org/10.1109/ojnano.2025.3544166openalex-snapshot
Design of a VDBA-Based Memristor Emulator and Its Application for Bio-Sensing Through Instrument Amplifier
inferred← citeshttps://doi.org/10.1109/ojnano.2025.3613007openalex-snapshot
Analog Building Blocks: VDIBA and CDBA Based Energy-Efficient High-Speed Memristor Emulator for Neuromorphic Applications
inferred← citeshttps://doi.org/10.1109/rsm46715.2019.8943560openalex-snapshot
Analysis of a Novel Non-Volatile Look-Up Table (NV LUT) Controller Design with Resistive Random-Access Memories (RRAM) for Field-Programmable Gate Arrays (FPGA)
inferred← citeshttps://doi.org/10.1109/scored53546.2021.9652781openalex-snapshot
Effect of Sneak Path Current in TiOx/HfOx Based 1S1R RRAM Crossbar Memory Array
inferred← citeshttps://doi.org/10.1109/scored57082.2022.9973999openalex-snapshot
A ReRAM-based Nonvolatile FPGA
inferred← citeshttps://doi.org/10.1109/scored57082.2022.9974093openalex-snapshot
A ReRAM-based Nonvolatile PIM
inferred← citeshttps://doi.org/10.1109/scored64708.2024.10872668openalex-snapshot
Impacts of Wire Resistance and Capacitance on Memristor Crossbar Arrays
inferred← citeshttps://doi.org/10.1109/tcad.2020.2999919openalex-snapshot
Flux Controlled Floating Memristor Employing VDTA: Incremental or Decremental Operation
inferred← citeshttps://doi.org/10.1109/tvlsi.2018.2890591openalex-snapshot
A Simple Floating MOS-Memristor for High-Frequency Applications
inferred← citeshttps://doi.org/10.1142/s0218126625500598openalex-snapshot
Analysis of FPGA Architecture with Hybrid Logic Blocks Based on ULG and LUT
inferred← citeshttps://doi.org/10.1155/2022/2770333openalex-snapshot
Sports Smart Data Writing Based on New-Type Semiconductor Nonvolatile Storage Mode
inferred← citeshttps://doi.org/10.2139/ssrn.5175484openalex-snapshot
Memristor Crossbar Array with Highway Gates to Prevent Sneak-Path Currents
inferred← citeshttps://doi.org/10.22184/1993-8578.2025.18.11s.486.491openalex-snapshot
ЭНЕРГОЭФФЕКТИВНЫЙ И МАСШТАБИРУЕМЫЙ МАРШРУТИЗАТОР НЕЙРОННЫХ ИМПУЛЬСОВ
inferred← citeshttps://doi.org/10.3390/electronics10111225openalex-snapshot
Memcapacitor and Meminductor Circuit Emulators: A Review
inferred← citeshttps://doi.org/10.36227/techrxiv.20318268openalex-snapshot
Low-Power VDBA based Grounded and Floating Memristor Emulators
inferred← citeshttps://doi.org/10.36227/techrxiv.20318268.v1openalex-snapshot
Low-Power VDBA based Grounded and Floating Memristor Emulators
inferred← citeshttps://doi.org/10.48084/etasr.4882openalex-snapshot
Memristor, Memcapacitor, Meminductor : Models and Experimental Circuit Emulators
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