On the public citation graph

Efficient simulation-based optimization of power grid with on-chip voltage regulator

0 signed · 13 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/isqed.2013.6523604openalex-snapshot
A novel and efficient method for power pad placement optimization
inferredcites →https://doi.org/10.1109/jssc.2003.817256openalex-snapshot
A capacitor-free cmos low-dropout regulator with damping-factor-control frequency compensation
inferredcites →https://doi.org/10.1109/tcsi.2007.902615openalex-snapshot
Full On-Chip CMOS Low-Dropout Voltage Regulator
inferredcites →https://doi.org/10.1145/1837274.1837483openalex-snapshot
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation
inferredcites →https://doi.org/10.1145/2429384.2429433openalex-snapshot
Stability assurance and design optimization of large power delivery networks with multiple on-chip voltage regulators
inferredcites →https://doi.org/10.1145/2429384.2429524openalex-snapshot
PGT_SOLVER

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.5281/zenodo.1253592openalex-extracted
Hipdn: A Power Distribution Network For Efficient On-Chip Power Delivery And Finegrain Low-Power Applications
inferred← citeshttps://doi.org/10.1109/dac63849.2025.11132516openalex-snapshot
Invited: EDA for Heterogeneous Integration
inferred← citeshttps://doi.org/10.1109/iccad66269.2025.11240850openalex-snapshot
Optimal Selection and Placement of Voltage Regulators in 2.5D Heterogeneously Integrated Systems
inferred← citeshttps://doi.org/10.1109/tcad.2023.3319285openalex-snapshot
Power Aware Placement of On-Chip Voltage Regulators
inferred← citeshttps://doi.org/10.1109/tencon.2015.7373046openalex-snapshot
Voltage droop aware task mapping for multi-core systems with on-chip voltage regulator
inferred← citeshttps://doi.org/10.1109/tvlsi.2017.2742944openalex-snapshot
Efficiency, Stability, and Reliability Implications of Unbalanced Current Sharing Among Distributed On-Chip Voltage Regulators
inferred← citeshttps://doi.org/10.1145/3177877openalex-snapshot
Optimal Allocation of LDOs and Decoupling Capacitors within a Distributed On-Chip Power Grid
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.