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Exploring “ temperature-aware ” design in low-power MPSoCs

https://doi.org/10.1109/date.2006.243741

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/4.953485openalex-snapshot

Design impact of positive temperature dependence on drain current in sub-1-V CMOS VLSIs

inferredcites →https://doi.org/10.1109/5.915374openalex-snapshot

Device scaling limits of Si MOSFETs and their application dependencies

inferredcites →https://doi.org/10.1109/cmpcon.1997.584744openalex-snapshot

Thermal management system for high performance PowerPC/sup TM/ microprocessors

inferredcites →https://doi.org/10.1109/date.2004.1268966openalex-snapshot

Analyzing on-chip communication in a MPSoC environment

inferredcites →https://doi.org/10.1109/date.2005.310openalex-snapshot

Thermal-Aware Task Allocation and Scheduling for Embedded Systems

inferredcites →https://doi.org/10.1109/hpca.2001.903261openalex-snapshot

Dynamic thermal management for high-performance microprocessors

inferredcites →https://doi.org/10.1109/iccad.2004.1382595openalex-snapshot

Interconnect lifetime prediction under dynamic stress for reliability-aware design

inferredcites →https://doi.org/10.1109/isqed.2001.915216openalex-snapshot

Scaling-induced reductions in CMOS reliability margins and the escalating need for increased design-in reliability efforts

inferredcites →https://doi.org/10.1109/isscc.2005.1493930openalex-snapshot

The design and implementation of a first-generation CELL processor

inferredcites →https://doi.org/10.1109/isscc.2005.1493990openalex-snapshot

Power and temperature control on a 90nm itanium~-family processor

inferredcites →https://doi.org/10.1109/isscc.2006.1696278openalex-snapshot

Power Distribution Measurements of the Dual Core PowerPC/sup TM/ 970MP Microprocessor

inferredcites →https://doi.org/10.1109/jproc.2004.840301openalex-snapshot

The Design and Implementation of FFTW3

inferredcites →https://doi.org/10.1109/jssc.2002.803957openalex-snapshot

A 175-MV multiply-accumulate unit using an adaptive supply voltage and body bias architecture

inferredcites →https://doi.org/10.1109/jssc.2005.859902openalex-snapshot

Power and Temperature Control on a 90-nm Itanium Family Processor

inferredcites →https://doi.org/10.1109/tpds.2005.22openalex-snapshot

NoC synthesis flow for customized domain specific multiprocessor systems-on-chip

inferredcites →https://doi.org/10.1145/360128.360149openalex-snapshot

A framework for dynamic energy efficiency and temperature management

inferredcites →https://doi.org/10.1145/859618.859620openalex-snapshot

Temperature-aware microarchitecture

inferredcites →https://doi.org/10.1145/871506.871529openalex-snapshot

Full chip leakage estimation considering power supply and temperature variations

inferredcites →https://doi.org/10.1145/871506.871560openalex-snapshot

Microarchitecture level power and thermal simulation considering temperature dependent leakage model

inferredcites →https://doi.org/10.1145/871506.871561openalex-snapshot

Reducing power density through activity migration

inferredcites →https://doi.org/10.1145/988952.989049openalex-snapshot

Cycle-accurate power analysis for multiprocessor systems-on-a-chip

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-1-4020-9714-0_20openalex-snapshot

Analysis of Non-functional Properties of MPSoC Designs

inferred← citeshttps://doi.org/10.1007/978-3-642-18129-0_29openalex-snapshot

Thermal Hotspots in CPU Die and It’s Future Architecture

inferred← citeshttps://doi.org/10.1007/978-3-642-23786-7_11openalex-snapshot

Neuron Constraints to Model Complex Real-World Problems

inferred← citeshttps://doi.org/10.1016/j.compeleceng.2012.07.008openalex-snapshot

Combined heuristics for synthesis of SOCs with time and power constraints

inferred← citeshttps://doi.org/10.1016/j.conengprac.2022.105099openalex-snapshot

A two-layer distributed MPC approach to thermal control of Multiprocessor Systems-on-Chip

inferred← citeshttps://doi.org/10.1016/j.mejo.2010.08.003openalex-snapshot

Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling

inferred← citeshttps://doi.org/10.1016/j.suscom.2010.10.004openalex-snapshot

Temperature-aware computing

inferred← citeshttps://doi.org/10.1049/iet-cds.2011.0350openalex-snapshot

Power profiling-guided floorplanner for 3D multi-processor systems-on-chip

inferred← citeshttps://doi.org/10.1093/ietele/e91-c.4.418openalex-snapshot

Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems

inferred← citeshttps://doi.org/10.1109/apccas.2008.4746358openalex-snapshot

Processor frequency assignment in three-dimensional MPSoCs under thermal constraints by polynomial programming

inferred← citeshttps://doi.org/10.1109/cit.2010.376openalex-snapshot

Promoting Multi-Core Education via Special Training and Workshop Program

inferred← citeshttps://doi.org/10.1109/date.2011.5763141openalex-snapshot

A distributed and self-calibrating model-predictive controller for energy and thermal management of high-performance multicores

inferred← citeshttps://doi.org/10.1109/dsd.2008.132openalex-snapshot

Temperature and Leakage Aware Power Control for Embedded Streaming Applications

inferred← citeshttps://doi.org/10.1109/fdl.2008.4641430openalex-snapshot

Integrated requirement evaluation of non-functional system-on-chip properties

inferred← citeshttps://doi.org/10.1109/hpcsim.2014.6903672openalex-snapshot

Optimum: Thermal-aware task allocation for heterogeneous many-core devices

inferred← citeshttps://doi.org/10.1109/icccas.2008.4658002openalex-snapshot

Exploiting thermal-area tradeoffs in high-level synthesis through resources number selection

inferred← citeshttps://doi.org/10.1109/iscas.2010.5537347openalex-snapshot

Temperature sensor placement in thermal management systems for MPSoCs

inferred← citeshttps://doi.org/10.1109/iscas.2010.5537891openalex-snapshot

Multicore thermal management using approximate explicit model predictive control

inferred← citeshttps://doi.org/10.1109/isqed.2007.158openalex-snapshot

Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems

inferred← citeshttps://doi.org/10.1109/issoc.2007.4427441openalex-snapshot

MiGra: A Task Migration Algorithm for Reducing Temperature Gradient in Multiprocessor Systems on Chip

inferred← citeshttps://doi.org/10.1109/isvlsi.2010.39openalex-snapshot

Adaptive Task Migration Policies for Thermal Control in MPSoCs

inferred← citeshttps://doi.org/10.1109/latw.2011.5985921openalex-snapshot

3D Thermal-aware floorplanner for many-core single-chip systems

inferred← citeshttps://doi.org/10.1109/mdat.2017.2750907openalex-snapshot

A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors

inferred← citeshttps://doi.org/10.1109/patmos.2013.6662161openalex-snapshot

On-line thermal emulation: How to speed-up your thermal controller design

inferred← citeshttps://doi.org/10.1109/pdp.2015.56openalex-snapshot

Ctherm: An Integrated Framework for Thermal-Functional Co-simulation of Systems-on-Chip

inferred← citeshttps://doi.org/10.1109/tc.2012.293openalex-snapshot

An Effective Gray-Box Identification Procedure for Multicore Thermal Modeling

inferred← citeshttps://doi.org/10.1109/tcad.2009.2032372openalex-snapshot

Thermal Balancing Policy for Multiprocessor Stream Computing Platforms

inferred← citeshttps://doi.org/10.1109/tcad.2012.2183371openalex-snapshot

A Fast High-Level Event-Driven Thermal Estimator for Dynamic Thermal Aware Scheduling

inferred← citeshttps://doi.org/10.1109/tpds.2012.117openalex-snapshot

Thermal and Energy Management of High-Performance Multicores: Distributed and Self-Calibrating Model-Predictive Controller

inferred← citeshttps://doi.org/10.1109/tvlsi.2010.2058873openalex-snapshot

Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs

inferred← citeshttps://doi.org/10.1109/tvlsi.2016.2642587openalex-snapshot

Fighting Dark Silicon: Toward Realizing Efficient Thermal-Aware 3-D Stacked Multiprocessors

inferred← citeshttps://doi.org/10.1145/1228784.1228787openalex-snapshot

Multi-processor operating system emulation framework with thermal feedback for systems-on-chip

inferred← citeshttps://doi.org/10.1145/1255456.1255463openalex-snapshot

HW-SW emulation framework for temperature-aware design in MPSoCs

inferred← citeshttps://doi.org/10.1145/1289816.1289845openalex-snapshot

Temperature-aware processor frequency assignment for MPSoCs using convex optimization

inferred← citeshttps://doi.org/10.1145/1289816.1289846openalex-snapshot

Three-dimensional multiprocessor system-on-chip thermal optimization

inferred← citeshttps://doi.org/10.1145/1403375.1403405openalex-snapshot

Temperature control of high-performance multi-core platforms using convex optimization

inferred← citeshttps://doi.org/10.1145/1403375.1403446openalex-snapshot

Temperature-aware scheduling and assignment for hard real-time applications on MPSoCs

inferred← citeshttps://doi.org/10.1145/1403375.1403554openalex-snapshot

Thermal balancing policy for streaming computing on multiprocessor architectures

inferred← citeshttps://doi.org/10.1145/1531542.1531631openalex-snapshot

Dynamic thermal-aware scheduling on chip multiprocessor for soft real-time system

inferred← citeshttps://doi.org/10.1145/1629435.1629469openalex-snapshot

ESL power analysis of embedded processors for temperature and reliability estimations

inferred← citeshttps://doi.org/10.1145/1785481.1785532openalex-snapshot

Online convex optimization-based algorithm for thermal management of MPSoCs

inferred← citeshttps://doi.org/10.1145/1785481.1785550openalex-snapshot

An integrated thermal estimation framework for industrial embedded platforms

inferred← citeshttps://doi.org/10.1145/1785481.1785553openalex-snapshot

A virtual platform environment for exploring power, thermal and reliability management control strategies in high-performance multicores

inferred← citeshttps://doi.org/10.1145/3694687openalex-snapshot

Modeling and Controlling Many-Core HPC Processors: An Alternative to PID and Moving Average Algorithms

inferred← citeshttps://doi.org/10.1166/jolpe.2013.1279openalex-snapshot

Adaptive Thermal Monitoring of Deep-Submicron CMOS VLSI Circuits

inferred← citeshttps://doi.org/10.1609/aaai.v26i1.8138openalex-snapshot

Optimization and Controlled Systems: A Case Study on Thermal Aware Workload Dispatching

inferred← citeshttps://doi.org/10.18419/opus-3287openalex-snapshot

Multi-level analysis of non-functional properties

inferred← citeshttps://doi.org/10.2197/ipsjtsldm.3.140openalex-snapshot

Design and Run-time Reliability at the Electronic System Level

inferred← citeshttps://doi.org/10.4230/dagsemproc.07041.11openalex-snapshot

Thermal Characterization and Thermal Management in Processor-Based Systems

inferred← citeshttps://doi.org/10.5075/epfl-thesis-5253openalex-snapshot

Design of Thermal Management Control Policies for Multiprocessors Systems on Chip

inferred← citeshttps://doi.org/10.5555/1509633.1509645openalex-snapshot

A control theory approach for thermal balancing of MPSoC

inferred← citeshttps://doi.org/10.5555/1899721.1899903openalex-snapshot

High level event driven thermal estimation for thermal aware task allocation and scheduling

inferred← citeshttps://doi.org/10.5555/2755753.2757076openalex-snapshot

A calibration based thermal modeling technique for complex multicore systems

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