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15–4 Approximate Compressor Based Multiplier for Image Processing

https://doi.org/10.1109/icoei.2018.8553734
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1023/a:1015333103608openalex-snapshot
A 16-Bit by 16-Bit MAC Design Using Fast 5:3 Compressor Cells
inferredcites →https://doi.org/10.1109/12.485568openalex-snapshot
A method for speed optimized partial product reduction and generation of fast parallel multipliers using an algorithmic approach
inferredcites →https://doi.org/10.1109/access.2016.2636128openalex-snapshot
Design and Analysis of Multiplier Using Approximate 15-4 Compressor
inferredcites →https://doi.org/10.1109/edssc.2010.5713751openalex-snapshot
Low-power high-speed multiplier for error-tolerant application
inferredcites →https://doi.org/10.1109/iccsp.2013.6577111openalex-snapshot
Design of high speed and low power 15-4 compressor
inferredcites →https://doi.org/10.1109/icetet.2008.151openalex-snapshot
Design, Simulation and Testing of a High Speed Low Power 15-4 Compressor for High Speed Multiplication Applications
inferredcites →https://doi.org/10.1109/islped.2011.5993675openalex-snapshot
IMPACT: IMPrecise adders for low-power approximate computing
inferredcites →https://doi.org/10.1109/tc.2012.146openalex-snapshot
New Metrics for the Reliability of Approximate and Probabilistic Adders
inferredcites →https://doi.org/10.1109/tc.2014.2308214openalex-snapshot
Design and Analysis of Approximate Compressors for Multiplication
inferredcites →https://doi.org/10.1109/tvlsi.2016.2643639openalex-snapshot
Design of Power and Area Efficient Approximate Multipliers
inferredcites →https://doi.org/10.5555/2016802.2016898openalex-snapshot
IMPACT: imprecise adders for low-power approximate computing

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.2139/ssrn.4172058openalex-extracted
A New Approximate (8; 2) Compressor for Image Processing Applications
inferred← citeshttps://doi.org/10.1007/978-981-16-5048-2_2openalex-snapshot
Performance Analysis of 32-Bit DADDA Multiplier Using 15–4 Compressor
inferred← citeshttps://doi.org/10.1007/978-981-99-8646-0_53openalex-snapshot
Design of Energy-Efficient Approximate Arithmetic Circuits for Error Tolerant Medical Image Processing Applications
inferred← citeshttps://doi.org/10.1007/s00034-023-02418-yopenalex-snapshot
Designing of an 8 × 8 Multiplier with New Inexact 4:2 Compressors for Image Processing Applications
inferred← citeshttps://doi.org/10.1080/03772063.2023.2171915openalex-snapshot
A New Approximate (8; 2) Compressor for Image Processing Applications
inferred← citeshttps://doi.org/10.1108/cw-09-2020-0219openalex-snapshot
A novel design of N-bit approximate comparator for image processing applications
inferred← citeshttps://doi.org/10.1109/ccwc60891.2024.10427674openalex-snapshot
Efficient Designs for the 8-Bit Approximate Fixed Point Multiplication
inferred← citeshttps://doi.org/10.1109/icetems56252.2022.10093398openalex-snapshot
Computationally Optimized Approximate Computing for Signal Processing Applications
inferred← citeshttps://doi.org/10.1109/iscas45731.2020.9181066openalex-snapshot
An Optimized Compression Strategy for Compressor-Based Approximate Multiplier
inferred← citeshttps://doi.org/10.1109/ises52644.2021.00044openalex-snapshot
Efficient Design of Artificial Neural Networks using Approximate Compressors and Multipliers
inferred← citeshttps://doi.org/10.1371/journal.pone.0308796openalex-snapshot
Hardware optimization for effective switching power reduction during data compression in GOLOMB rice coding
inferred← citeshttps://doi.org/10.35940/ijeat.f8273.088619openalex-snapshot
Area and Delay Efficient Compressor Based Montgomery Multiplier
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