On the public citation graph
Reduced-Bandwidth Multithreaded Algorithms for Sparse Matrix-Vector Multiplication
0 signed · 174 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1006/jpdc.1996.0107openalex-snapshot
Cilk: An Efficient Multithreaded Runtime System
inferredcites →https://doi.org/10.1007/11557654_91openalex-snapshot
Fast Sparse Matrix-Vector Multiplication by Exploiting Variable Block Structure
inferredcites →https://doi.org/10.1007/978-0-230-37405-8_1openalex-snapshot
Introduction to algorithms
inferredcites →https://doi.org/10.1007/s00224-010-9285-4openalex-snapshot
Optimal Sparse Matrix Dense Vector Multiplication in the I/O-Model
inferredcites →https://doi.org/10.1016/j.parco.2008.12.006openalex-snapshot
Optimization of sparse matrix-vector multiplication on emerging multicore platforms
inferredcites →https://doi.org/10.1016/j.parco.2010.02.003openalex-snapshot
Parallel symmetric sparse matrix–vector product on scalar multi-core CPUs
inferredcites →https://doi.org/10.1016/s0167-8191(01)00073-4openalex-snapshot
Towards a fast parallel sparse symmetric matrix–vector multiplication
inferredcites →https://doi.org/10.1088/1742-6596/16/1/071openalex-snapshot
OSKI: A library of automatically tuned sparse matrix kernels
inferredcites →https://doi.org/10.1109/71.780863openalex-snapshot
Hypergraph-partitioning-based decomposition for parallel sparse-matrix vector multiplication
inferredcites →https://doi.org/10.1109/hipc.1997.634472openalex-snapshot
On improving the performance of sparse matrix-vector multiplication
inferredcites →https://doi.org/10.1109/icpp.2004.1327917openalex-snapshot
Performance models for evaluation and automatic tuning of symmetric sparse matrix-vector multiply
inferredcites →https://doi.org/10.1109/icpp.2004.58openalex-snapshot
Performance models for evaluation and automatic tuning of symmetric sparse matrix-vector multiply
inferredcites →https://doi.org/10.1109/ipdps.2008.4536313openalex-snapshot
On the representation and multiplication of hypersparse matrices
inferredcites →https://doi.org/10.1109/superc.1992.236646openalex-snapshot
Characterizing the behavior of sparse algorithms on caches
inferredcites →https://doi.org/10.1109/synasc.2010.72openalex-snapshot
On BLAS Operations with Recursively Stored Sparse Matrices
inferredcites →https://doi.org/10.1137/080733243openalex-snapshot
Cache-Oblivious Sparse Matrix–Vector Multiplication by Using Sparse Matrix Partitioning Methods
inferredcites →https://doi.org/10.1137/s0036144502409019openalex-snapshot
A Two-Dimensional Data Distribution Method for Parallel Sparse Matrix-Vector Multiplication
inferredcites →https://doi.org/10.1142/9781848160170_0036openalex-snapshot
TOWARDS A FAST PARALLEL SPARSE MATRIX-VECTOR MULTIPLICATION
inferredcites →https://doi.org/10.1145/1183401.1183444openalex-snapshot
Accelerating sparse matrix computations via data compression
inferredcites →https://doi.org/10.1145/1248377.1248391openalex-snapshot
Optimal sparse matrix dense vector multiplication in the I/O-model
inferredcites →https://doi.org/10.1145/1366230.1366244openalex-snapshot
Optimizing sparse matrix-vector multiplication using index and value compression
inferredcites →https://doi.org/10.1145/1542275.1542294openalex-snapshot
Pattern-based sparse matrix representation for memory-efficient SMVM kernels
inferredcites →https://doi.org/10.1145/1583991.1584053openalex-snapshot
Parallel sparse matrix-vector and matrix-transpose-vector multiplication using compressed sparse blocks
inferredcites →https://doi.org/10.1145/1654059.1654108openalex-snapshot
Memory-efficient optimization of Gyrokinetic particle-to-grid interpolation for multicore processors
inferredcites →https://doi.org/10.1145/2049662.2049663openalex-snapshot
The university of Florida sparse matrix collection
inferredcites →https://doi.org/10.1145/324133.324234openalex-snapshot
Scheduling multithreaded computations by work stealing
inferredcites →https://doi.org/10.1145/331532.331562openalex-snapshot
Improving performance of sparse matrix-vector multiplication
inferredcites →https://doi.org/10.1145/800195.805928openalex-snapshot
Reducing the bandwidth of sparse symmetric matrices
inferredcites →https://doi.org/10.1147/rd.416.0711openalex-snapshot
Improving the memory-system performance of sparse-matrix vector multiplication
inferredcites →https://doi.org/10.1177/1094342004041294openalex-snapshot
Sparse Tiling for Stationary Iterative Methods
inferredcites →https://doi.org/10.1177/1094342004041296openalex-snapshot
Sparsity: Optimization Framework for Sparse Matrix Kernels
inferredcites →https://doi.org/10.5555/1352079.1352134openalex-snapshot
Intel threading building blocks
inferredcites →https://doi.org/10.5555/147877.148091openalex-snapshot
Characterizing the behavior of sparse algorithms on caches
inferredcites →https://doi.org/10.7551/mitpress/9486.003.0016openalex-snapshot
Intel Threading Building Blocks
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.3341openalex-snapshot
Unveiling the performance‐energy trade‐off in iterative linear system solvers for multithreaded processors
inferred← citeshttps://doi.org/10.1002/cpe.6515openalex-snapshot
Compression and load balancing for efficient sparse matrix‐vector product on multicore processors and graphics processing units
inferred← citeshttps://doi.org/10.1002/cpe.7871openalex-snapshot
Sparse matrix‐vector and matrix‐multivector products for the truncated SVD on graphics processors
inferred← citeshttps://doi.org/10.1007/978-3-030-71593-9_7openalex-snapshot
Balanced and Compressed Coordinate Layout for the Sparse Matrix-Vector Product on GPUs
inferred← citeshttps://doi.org/10.1007/978-3-030-94705-7_14openalex-snapshot
Approximate Computing for Scientific Applications
inferred← citeshttps://doi.org/10.1007/978-3-031-31445-2_2openalex-snapshot
Tensor Iterators for Flexible High-Performance Tensor Computation
inferred← citeshttps://doi.org/10.1007/978-3-319-17248-4_9openalex-snapshot
Performance Modeling of the HPCG Benchmark
inferred← citeshttps://doi.org/10.1007/978-3-319-63579-8_10openalex-snapshot
Efficient Compression on Real World Directed Graphs
inferred← citeshttps://doi.org/10.1007/978-3-642-55224-3_52openalex-snapshot
Performance Evaluation of Sparse Matrix Multiplication Kernels on Intel Xeon Phi
inferred← citeshttps://doi.org/10.1007/978-3-642-55224-3_72openalex-snapshot
Performance and Energy Analysis of the Iterative Solution of Sparse Linear Systems on Multicore and Manycore Architectures
inferred← citeshttps://doi.org/10.1007/978-3-662-44199-2_102openalex-snapshot
Generating Optimized Sparse Matrix Vector Product over Finite Fields
inferred← citeshttps://doi.org/10.1007/978-3-662-48096-0_52openalex-snapshot
Systematic Fusion of CUDA Kernels for Iterative Sparse Linear System Solvers
inferred← citeshttps://doi.org/10.1007/s00607-026-01658-5openalex-snapshot
Sparse matrix–vector product on RISC-V processors with SIMD units
inferred← citeshttps://doi.org/10.1007/s10766-013-0262-9openalex-snapshot
MulticoreBSP for C: A High-Performance Library for Shared-Memory Parallel Programming
inferred← citeshttps://doi.org/10.1007/s11704-014-4127-1openalex-snapshot
Memory bandwidth optimization of SpMV on GPGPUs
inferred← citeshttps://doi.org/10.1007/s12532-026-00309-2openalex-snapshot
PDLP: a practical first-order method for large-scale linear programming
inferred← citeshttps://doi.org/10.1007/s13278-013-0106-zopenalex-snapshot
Fast recommendation on bibliographic networks with sparse-matrix ordering and partitioning
inferred← citeshttps://doi.org/10.1016/j.future.2020.02.076openalex-snapshot
MMSparse: 2D partitioning of sparse matrix based on mathematical morphology
inferred← citeshttps://doi.org/10.1016/j.jcss.2017.09.010openalex-snapshot
A parallel computing method using blocked format with optimal partitioning for SpMV on GPU
inferred← citeshttps://doi.org/10.1016/j.jpdc.2014.07.006openalex-snapshot
Regularizing graph centrality computations
inferred← citeshttps://doi.org/10.1016/j.jpdc.2015.06.010openalex-snapshot
A framework for general sparse matrix–matrix multiplication on GPUs and heterogeneous processors
inferred← citeshttps://doi.org/10.1016/j.jpdc.2016.12.023openalex-snapshot
A hybrid computing method of SpMV on CPU–GPU heterogeneous computing systems
inferred← citeshttps://doi.org/10.1016/j.micpro.2014.02.004openalex-snapshot
A hardware–software co-design approach for implementing sparse matrix vector multiplication on FPGAs
inferred← citeshttps://doi.org/10.1016/j.parco.2014.03.008openalex-snapshot
Efficient multithreaded untransposed, transposed or symmetric sparse matrix–vector multiplication with the Recursive Sparse Blocks format
inferred← citeshttps://doi.org/10.1016/j.parco.2015.01.003openalex-snapshot
Incremental closeness centrality in distributed memory
inferred← citeshttps://doi.org/10.1016/j.parco.2015.04.004openalex-snapshot
Speculative segmented sum for sparse matrix-vector multiplication on heterogeneous processors
inferred← citeshttps://doi.org/10.1016/j.parco.2016.02.004openalex-snapshot
An approach for code generation in the Sparse Polyhedral Framework
inferred← citeshttps://doi.org/10.1016/j.parco.2020.102710openalex-snapshot
CCF: An efficient SpMV storage format for AVX512 platforms
inferred← citeshttps://doi.org/10.1016/j.parco.2025.103147openalex-snapshot
ALBBA: An efficient ALgebraic Bypass BFS Algorithm on long vector architectures
inferred← citeshttps://doi.org/10.1109/asap.2019.00-28openalex-snapshot
Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration
inferred← citeshttps://doi.org/10.1109/asonam.2012.82openalex-snapshot
Fast Recommendation on Bibliographic Networks
inferred← citeshttps://doi.org/10.1109/ccoms.2019.8821708openalex-snapshot
Innovative Unit-Vector-Block Storage Format of Sparse Matrix and Vector
inferred← citeshttps://doi.org/10.1109/cgo51591.2021.9370327openalex-snapshot
Variable-Sized Blocks for Locality-Aware SpMV
inferred← citeshttps://doi.org/10.1109/cluster52292.2023.00025openalex-snapshot
HASpMV: Heterogeneity-Aware Sparse Matrix-Vector Multiplication on Modern Asymmetric Multicore Processors
inferred← citeshttps://doi.org/10.1109/dcc.2015.8openalex-snapshot
Smaller and Faster: Parallel Processing of Compressed Graphs with Ligra+
inferred← citeshttps://doi.org/10.1109/fccm.2012.12openalex-snapshot
Towards a Universal FPGA Matrix-Vector Multiplication Architecture
inferred← citeshttps://doi.org/10.1109/hipc.2013.6799135openalex-snapshot
Efficient sparse matrix multiple-vector multiplication using a bitmapped format
inferred← citeshttps://doi.org/10.1109/hipc.2014.7116882openalex-snapshot
A multilevel compressed sparse row format for efficient sparse computations on multicore processors
inferred← citeshttps://doi.org/10.1109/hpca51647.2021.00081openalex-snapshot
VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations
inferred← citeshttps://doi.org/10.1109/hpca68181.2026.11408479openalex-snapshot
Swift: High-Performance Sparse-Dense Matrix Multiplication on GPUs
inferred← citeshttps://doi.org/10.1109/hpca68181.2026.11408500openalex-snapshot
Uni-STC: Unified Sparse Tensor Core
inferred← citeshttps://doi.org/10.1109/hpec58863.2023.10363624openalex-snapshot
Optimizing Compression Schemes for Parallel Sparse Tensor Algebra
inferred← citeshttps://doi.org/10.1109/ia3.2018.00015openalex-snapshot
High-Performance GPU Implementation of PageRank with Reduced Precision Based on Mantissa Segmentation
inferred← citeshttps://doi.org/10.1109/icpp.2017.38openalex-snapshot
Performance Analysis and Optimization of Sparse Matrix-Vector Multiplication on Modern Multi- and Many-Core Processors
inferred← citeshttps://doi.org/10.1109/icssit46314.2019.8987886openalex-snapshot
Dynamic Heterogeneous scheduling of GPU-CPU in Distributed Environment
inferred← citeshttps://doi.org/10.1109/ipdps.2012.14openalex-snapshot
Improving the Performance of Dynamical Simulations Via Multiple Right-Hand Sides
inferred← citeshttps://doi.org/10.1109/ipdps.2013.43openalex-snapshot
Improving the Performance of the Symmetric Sparse Matrix-Vector Multiplication in Multicore
inferred← citeshttps://doi.org/10.1109/ipdps.2014.47openalex-snapshot
An Efficient GPU General Sparse Matrix-Matrix Multiplication for Irregular Data
inferred← citeshttps://doi.org/10.1109/ipdps49936.2021.00016openalex-snapshot
TileSpMV: A Tiled Algorithm for Sparse Matrix-Vector Multiplication on GPUs
inferred← citeshttps://doi.org/10.1109/ipdps53621.2022.00056openalex-snapshot
Bit-GraphBLAS: Bit-Level Optimizations of Matrix-Centric Graph Processing on GPU
inferred← citeshttps://doi.org/10.1109/ipdps65963.2026.00088openalex-snapshot
Rebo: Locality-Aware Graph Processing via Reordering and Blocking
inferred← citeshttps://doi.org/10.1109/ipdpsw.2014.156openalex-snapshot
Hardware/Software Vectorization for Closeness Centrality on Multi-/Many-Core Architectures
inferred← citeshttps://doi.org/10.1109/ipdpsw.2017.134openalex-snapshot
Performance Analysis and Optimization of Sparse Matrix-Vector Multiplication on Intel Xeon Phi
inferred← citeshttps://doi.org/10.1109/ipdpsw.2019.00016openalex-snapshot
Programmable Acceleration for Sparse Matrices in a Data-Movement Limited World
inferred← citeshttps://doi.org/10.1109/ipdpsw55747.2022.00012openalex-snapshot
HETEROGENEOUS ARCHITECTURE FOR SPARSE DATA PROCESSING
inferred← citeshttps://doi.org/10.1109/ispdc.2012.9openalex-snapshot
Performance of a Structure-Detecting SpMV Using the CSR Matrix Representation
inferred← citeshttps://doi.org/10.1109/medo.2016.7746548openalex-snapshot
Power distribution management system software deployment
inferred← citeshttps://doi.org/10.1109/reconfig.2012.6416788openalex-snapshot
A case study of streaming storage format for sparse matrices
inferred← citeshttps://doi.org/10.1109/sbac-pad55451.2022.00019openalex-snapshot
Memory-Side Acceleration and Sparse Compression for Quantized Packed Convolutions
inferred← citeshttps://doi.org/10.1109/sc41406.2024.00054openalex-snapshot
A Conflict-aware Divide-and-Conquer Algorithm for Symmetric Sparse Matrix-Vector Multiplication
inferred← citeshttps://doi.org/10.1109/sc41406.2024.00058openalex-snapshot
AmgT: Algebraic Multigrid Solver on Tensor Cores
inferred← citeshttps://doi.org/10.1109/sc41406.2024.00064openalex-snapshot
Mille-feuille: A Tile-Grained Mixed Precision Single-Kernel Conjugate Gradient Solver on GPUs
inferred← citeshttps://doi.org/10.1109/snpd.2012.20openalex-snapshot
Optimizing Sparse Matrix Vector Multiplication Using Cache Blocking Method on Fermi GPU
inferred← citeshttps://doi.org/10.1109/tc.2014.2366731openalex-snapshot
Performance Optimization Using Partitioned SpMV on GPUs and Multicore CPUs
inferred← citeshttps://doi.org/10.1109/tpds.2012.290openalex-snapshot
An Extended Compression Format for the Optimization of Sparse Matrix-Vector Multiplication
inferred← citeshttps://doi.org/10.1109/tpds.2013.31openalex-snapshot
High-Level Strategies for Parallel Shared-Memory Sparse Matrix-Vector Multiplication
inferred← citeshttps://doi.org/10.1109/tpds.2020.3040150openalex-snapshot
Adaptive SpMV/SpMSpV on GPUs for Input Vectors of Varied Sparsity
inferred← citeshttps://doi.org/10.1142/s0129626411000254openalex-snapshot
HYBRID-PARALLEL SPARSE MATRIX-VECTOR MULTIPLICATION WITH EXPLICIT COMMUNICATION OVERLAP ON CURRENT MULTICORE-BASED SYSTEMS
inferred← citeshttps://doi.org/10.1145/2304576.2304603openalex-snapshot
Sparse matrix-vector multiply on the HICAMP architecture
inferred← citeshttps://doi.org/10.1145/2464996.2465013openalex-snapshot
Efficient sparse matrix-vector multiplication on x86-based many-core processors
inferred← citeshttps://doi.org/10.1145/2597652.2597654openalex-snapshot
Collective memory transfers for multi-core chips
inferred← citeshttps://doi.org/10.1145/2597652.2597656openalex-snapshot
Acceleration of derivative calculations with application to radial basis function
inferred← citeshttps://doi.org/10.1145/2658761.2658773openalex-snapshot
Optimization by runtime specialization for sparse matrix-vector multiplication
inferred← citeshttps://doi.org/10.1145/2775053.2658773openalex-snapshot
Optimization by runtime specialization for sparse matrix-vector multiplication
inferred← citeshttps://doi.org/10.1145/2851500openalex-snapshot
Autotuning Runtime Specialization for Sparse Matrix-Vector Multiplication
inferred← citeshttps://doi.org/10.1145/2925426.2926291openalex-snapshot
Parallel Transposition of Sparse Data Structures
inferred← citeshttps://doi.org/10.1145/2994148openalex-snapshot
A Cross-Platform SpMV Framework on Many-Core Architectures
inferred← citeshttps://doi.org/10.1145/3018787openalex-snapshot
Shared-Memory Parallelism Can Be Simple, Fast, and Scalable
inferred← citeshttps://doi.org/10.1145/3018787.3018791openalex-snapshot
Internally Deterministic Parallelism: Techniques and Algorithms
inferred← citeshttps://doi.org/10.1145/3018787.3018792openalex-snapshot
Deterministic Parallelism in Sequential Iterative Algorithms
inferred← citeshttps://doi.org/10.1145/3018787.3018793openalex-snapshot
A Deterministic Phase-Concurrent Parallel Hash Table
inferred← citeshttps://doi.org/10.1145/3018787.3018794openalex-snapshot
Priority Updates: A Contention-Reducing Primitive for Deterministic Programming
inferred← citeshttps://doi.org/10.1145/3018787.3018795openalex-snapshot
Ligra: A Lightweight Graph Processing Framework for Shared Memory
inferred← citeshttps://doi.org/10.1145/3018787.3018796openalex-snapshot
Ligra+: Adding Compression to Ligra
inferred← citeshttps://doi.org/10.1145/3018787.3018797openalex-snapshot
Linear-Work Parallel Graph Connectivity
inferred← citeshttps://doi.org/10.1145/3018787.3018798openalex-snapshot
Parallel and Cache-Oblivious Triangle Computations
inferred← citeshttps://doi.org/10.1145/3018787.3018799openalex-snapshot
Parallel Cartesian Tree and Suffix Tree Construction
inferred← citeshttps://doi.org/10.1145/3018787.3018800openalex-snapshot
Parallel Computation of Longest Common Prefixes
inferred← citeshttps://doi.org/10.1145/3018787.3018801openalex-snapshot
Parallel Lempel-Ziv Factorization
inferred← citeshttps://doi.org/10.1145/3018787.3018802openalex-snapshot
Parallel Wavelet Tree Construction
inferred← citeshttps://doi.org/10.1145/3178487.3178506openalex-snapshot
Making pull-based graph processing performant
inferred← citeshttps://doi.org/10.1145/3200691.3178506openalex-snapshot
Making pull-based graph processing performant
inferred← citeshttps://doi.org/10.1145/3218823openalex-snapshot
Design and Implementation of Adaptive SpMV Library for Multicore and Many-Core Architecture
inferred← citeshttps://doi.org/10.1145/3293883.3295712openalex-snapshot
Adaptive sparse tiling for sparse matrix multiplication
inferred← citeshttps://doi.org/10.1145/3295500.3356148openalex-snapshot
Conflict-free symmetric sparse matrix-vector multiplication on multicore architectures
inferred← citeshttps://doi.org/10.1145/3399732openalex-snapshot
A Recursive Algebraic Coloring Technique for Hardware-efficient Symmetric Sparse Matrix-vector Multiplication
inferred← citeshttps://doi.org/10.1145/3422575.3422777openalex-snapshot
ExPress: Simultaneously Achieving Storage, Execution and Energy Efficiencies in Moderately Sparse Matrix Computations
inferred← citeshttps://doi.org/10.1145/3545008.3545042openalex-snapshot
Vectorizing SpMV by Exploiting Dynamic Regular Patterns
inferred← citeshttps://doi.org/10.1145/3712285.3759841openalex-snapshot
FaSTCC: Fast Sparse Tensor Contractions on CPUs
inferred← citeshttps://doi.org/10.1145/3716874openalex-snapshot
Exploiting Dynamic Regular Patterns in Irregular Programs for Efficient Vectorization
inferred← citeshttps://doi.org/10.1145/3721145.3725746openalex-snapshot
CB-SpMV:A Data Aggregating and Balance Algorithm for for Cache-Friendly Block-Based SpMV on GPUs
inferred← citeshttps://doi.org/10.1145/3774934.3786459openalex-snapshot
PANA: A Fine-Grained Runtime-Adaptive Load Balancing for Parallel SpMV on Multicore CPUs
inferred← citeshttps://doi.org/10.1145/3803015openalex-snapshot
Towards Efficient Symmetric Sparse Matrix-Vector Multiplication on Multi-Cores
inferred← citeshttps://doi.org/10.1177/1094342015580139openalex-snapshot
Acceleration of GPU-based Krylov solvers via data transfer reduction
inferred← citeshttps://doi.org/10.12681/eadd/52494openalex-snapshot
Accelerating irregular applications via efficient synchronization and data access techniques
inferred← citeshttps://doi.org/10.12694/scpe.v19i3.1358openalex-snapshot
Analysis of Memory Footprints of Sparse Matrices Partitioned Into Uniformly-Sized Blocks
inferred← citeshttps://doi.org/10.12794/metadc1873542openalex-snapshot
Improving Memory Performance for Both High Performance Computing and Embedded/Edge Computing Systems
inferred← citeshttps://doi.org/10.12794/metadc2415970openalex-snapshot
Enhancing Sparse Data Processing through Energy-Efficient Heterogeneous Architectures
inferred← citeshttps://doi.org/10.12794/metadc2415998openalex-snapshot
A Study of Sparse Data Acceleration for Machine Learning and Interference-Aware Scheduling for High Performance Computing
inferred← citeshttps://doi.org/10.15439/2017f70openalex-snapshot
On Memory Footprints of Partitioned Sparse Matrices
inferred← citeshttps://doi.org/10.21533/scjournal.v4i2.95openalex-snapshot
Power Distribution Management System revisited: Single-thread vs. Multithread Performance
inferred← citeshttps://doi.org/10.48550/arxiv.1210.2536openalex-snapshot
SMAT: An Input Adaptive Sparse Matrix-Vector Multiplication Auto-Tuner
inferred← citeshttps://doi.org/10.48550/arxiv.1503.05032openalex-snapshot
CSR5: An Efficient Storage Format for Cross-Platform Sparse Matrix-Vector Multiplication
inferred← citeshttps://doi.org/10.48550/arxiv.1906.00327openalex-snapshot
Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration (long version)
inferred← citeshttps://doi.org/10.48550/arxiv.2004.13907openalex-snapshot
Synergistic CPU-FPGA Acceleration of Sparse Linear Algebra
inferred← citeshttps://doi.org/10.5540/03.2015.003.01.0108openalex-snapshot
Implementing a parallel sparse matrix-vector multiplication using dataflow
inferred← citeshttps://doi.org/10.5555/2872599.2872609openalex-snapshot
Accelerating the LOBPCG method on GPUs using a blocked sparse matrix vector product
inferred← citeshttps://doi.org/10.5555/3213069.3213073openalex-snapshot
On tuning the symmetric sparse matrix vector multiplication with CSR and TJDS
inferred← citeshttps://doi.org/10.5821/dissertation-2117-351088openalex-snapshot
Novel techniques to improve the performance and the energy of vector architectures
inferred← citeshttps://doi.org/10.6035/14028.2016.34889openalex-snapshot
Consumo energético de métodos iterativos para sistemas dispersos en procesadores gráficos
inferred← citeshttps://doi.org/10.7717/peerj-cs.151openalex-snapshot
Computing the sparse matrix vector product using block-based kernels without zero padding on processors with AVX-512 instructions
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.