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On the Role of NVRAM in Data-intensive Architectures: An Evaluation
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/micro.2010.33openalex-snapshot
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
inferredcites →https://doi.org/10.1109/sc.2010.34openalex-snapshot
Multithreaded Asynchronous Graph Traversal for In-Memory and Semi-External Memory
inferredcites →https://doi.org/10.1109/sc.2010.56openalex-snapshot
Understanding the Impact of Emerging Non-Volatile Memories on High-Performance, IO-Intensive Computing
inferredcites →https://doi.org/10.1137/1.9781611972740.43openalex-snapshot
R-MAT: A Recursive Model for Graph Mining
inferredcites →https://doi.org/10.1145/1555754.1555760openalex-snapshot
Scalable high performance main memory system using phase-change memory technology
inferredcites →https://doi.org/10.1145/1629575.1629589openalex-snapshot
Better I/O through byte-addressable, persistent memory
inferredcites →https://doi.org/10.5555/1972457.1972479openalex-snapshot
SSDAlloc: hybrid SSD/RAM memory management made easy
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-319-13021-7_16openalex-snapshot
Exploring Opportunities for Non-volatile Memories in Big Data Applications
inferred← citeshttps://doi.org/10.1007/s10586-013-0309-0openalex-snapshot
DI-MMAP—a scalable memory-map runtime for out-of-core data-intensive applications
inferred← citeshttps://doi.org/10.1007/s11227-018-2466-7openalex-snapshot
Adaptive correlated prefetch with large-scale hybrid memory system for stream processing
inferred← citeshttps://doi.org/10.1016/j.future.2017.12.022openalex-snapshot
Performance characterization of scientific workflows for the optimal use of Burst Buffers
inferred← citeshttps://doi.org/10.1016/j.jocs.2019.04.004openalex-snapshot
Multi-agent large-scale parallel crowd simulation with NVRAM-based distributed cache
inferred← citeshttps://doi.org/10.1016/j.procs.2016.05.295openalex-snapshot
Checkpointing of Parallel MPI Applications Using MPI One-sided API with Support for Byte-addressable Non-volatile RAM
inferred← citeshttps://doi.org/10.1109/access.2024.3514377openalex-snapshot
Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems
inferred← citeshttps://doi.org/10.1109/bigdata.2014.7004270openalex-snapshot
NVM-based Hybrid BFS with memory efficient data structure
inferred← citeshttps://doi.org/10.1109/cluster.2012.76openalex-snapshot
An Out-of-Core Eigensolver on SSD-equipped Clusters
inferred← citeshttps://doi.org/10.1109/cluster.2017.94openalex-snapshot
Runtime Techniques for Programming with Fast and Slow Memory
inferred← citeshttps://doi.org/10.1109/hoti.2017.17openalex-snapshot
Fast Networks and Slow Memories: A Mechanism for Mitigating Bandwidth Mismatches
inferred← citeshttps://doi.org/10.1109/hoti.2019.00027openalex-snapshot
OmniXtend: Direct to Caches Over Commodity Fabric
inferred← citeshttps://doi.org/10.1109/hpca.2015.7056027openalex-snapshot
Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories
inferred← citeshttps://doi.org/10.1109/hpcc-smartcity-dss.2016.0074openalex-snapshot
Exploring Application Performance on Emerging Hybrid-Memory Supercomputers
inferred← citeshttps://doi.org/10.1109/hpcsim.2014.6903695openalex-snapshot
An evaluation of the potential of flash SSD as large and slow memory for stencil computations
inferred← citeshttps://doi.org/10.1109/hpec.2013.6670317openalex-snapshot
Exploiting free silicon for energy-efficient computing directly in NAND flash-based solid-state storage systems
inferred← citeshttps://doi.org/10.1109/ipdps.2013.72openalex-snapshot
Scaling Techniques for Massive Scale-Free Graphs in Distributed (External) Memory
inferred← citeshttps://doi.org/10.1109/ipdps.2018.00041openalex-snapshot
Software-Hardware Managed Last-level Cache Allocation Scheme for Large-Scale NVRAM-Based Multicores Executing Parallel Data Analytics Applications
inferred← citeshttps://doi.org/10.1109/ipdpsw.2014.189openalex-snapshot
Hybrid BFS Approach Using Semi-external Memory
inferred← citeshttps://doi.org/10.1109/mchpc49590.2019.00017openalex-snapshot
UMap: Enabling Application-driven Optimizations for Page Management
inferred← citeshttps://doi.org/10.1109/msst.2012.6232369openalex-snapshot
On the role of burst buffers in leadership-class storage systems
inferred← citeshttps://doi.org/10.1109/sc.2016.59openalex-snapshot
Optimal Execution of Co-analysis for Large-Scale Molecular Dynamics Simulations
inferred← citeshttps://doi.org/10.1109/sc.2018.00036openalex-snapshot
Siena: Exploring the Design Space of Heterogeneous Memory Systems
inferred← citeshttps://doi.org/10.1145/2318916.2318921openalex-snapshot
Integrated in-system storage architecture for high performance computing
inferred← citeshttps://doi.org/10.1145/2749469.2750420openalex-snapshot
Unified address translation for memory-mapped SSDs with FlashMap
inferred← citeshttps://doi.org/10.1145/2751205.2751212openalex-snapshot
Real-Time In-Memory Checkpointing for Future Hybrid Memory Systems
inferred← citeshttps://doi.org/10.1145/2807591.2807656openalex-snapshot
Optimal scheduling of in-situ analysis for large-scale scientific simulations
inferred← citeshttps://doi.org/10.1145/2818950.2818978openalex-snapshot
Towards Workload-Aware Page Cache Replacement Policies for Hybrid Memories
inferred← citeshttps://doi.org/10.1145/2846100openalex-snapshot
Efficient Memory-Mapped I/O on Fast Storage Device
inferred← citeshttps://doi.org/10.1145/2872887.2750420openalex-snapshot
Unified address translation for memory-mapped SSDs with FlashMap
inferred← citeshttps://doi.org/10.1145/2925426.2926284openalex-snapshot
Write-Aware Management of NVM-based Memory Extensions
inferred← citeshttps://doi.org/10.1145/3357526.3357555openalex-snapshot
Scaling the capacity of memory systems; evolution and key approaches
inferred← citeshttps://doi.org/10.1186/s40537-023-00761-0openalex-snapshot
Main memory controller with multiple media technologies for big data workloads
inferred← citeshttps://doi.org/10.12694/scpe.v19i1.1389openalex-snapshot
A Solution to Image Processing with Parallel MPI I/O and Distributed NVRAM Cache
inferred← citeshttps://doi.org/10.15439/2016f52openalex-snapshot
A Parallel MPI I/O Solution Supported by Byte-addressable Non-volatile RAM Distributed Cache
inferred← citeshttps://doi.org/10.5555/3014904.3014985openalex-snapshot
Optimal execution of co-analysis for large-scale molecular dynamics simulations
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