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Energy Efficiency Analysis of GPUs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-031-01721-6openalex-snapshot
Computer Architecture Techniques for Power-Efficiency
inferredcites →https://doi.org/10.1109/9780470544365openalex-snapshot
Design of High-Performance Microprocessor Circuits
inferredcites →https://doi.org/10.1109/cit.2011.69openalex-snapshot
An Instruction-Level Energy Estimation and Optimization Methodology for GPU
inferredcites →https://doi.org/10.1109/hpca.2005.43openalex-snapshot
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors
inferredcites →https://doi.org/10.1109/iiswc.2009.5306801openalex-snapshot
A characterization and analysis of PTX kernels
inferredcites →https://doi.org/10.1109/ipdps.2009.5160980openalex-snapshot
On the energy efficiency of graphics processing units for scientific computing
inferredcites →https://doi.org/10.1109/ipdps.2011.420openalex-snapshot
Power, Programmability, and Granularity: The Challenges of ExaScale Computing
inferredcites →https://doi.org/10.1109/isscc.1990.110213openalex-snapshot
A voltage reduction technique for digital systems
inferredcites →https://doi.org/10.1109/lpe.2000.155259openalex-snapshot
Gated-V/sub dd/: a circuit technique to reduce leakage in deep-submicron cache memories
inferredcites →https://doi.org/10.1109/mc.2003.1250885openalex-snapshot
Leakage current: Moore's law meets static power
inferredcites →https://doi.org/10.1109/mm.2005.56openalex-snapshot
Microprocessor Design Issues: Thoughts on the Road Ahead
inferredcites →https://doi.org/10.1109/mm.2012.17openalex-snapshot
Dark Silicon and the End of Multicore Scaling
inferredcites →https://doi.org/10.1145/1013235.1013249openalex-snapshot
Microarchitectural techniques for power gating of execution units
inferredcites →https://doi.org/10.1145/1058129.1058142openalex-snapshot
A flexible simulation framework for graphics architectures
inferredcites →https://doi.org/10.1145/1815961.1815998openalex-snapshot
An integrated GPU power and performance model
inferredcites →https://doi.org/10.1145/2000064.2000108openalex-snapshot
Dark silicon and the end of multicore scaling
inferredcites →https://doi.org/10.1145/2019608.2019612openalex-snapshot
Power gating strategies on GPUs
inferredcites →https://doi.org/10.1145/378239.379016openalex-snapshot
Dynamic voltage scaling and power management for portable systems
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.3692openalex-snapshot
Green computing on graphics processing units
inferred← citeshttps://doi.org/10.1007/s00450-013-0237-5openalex-snapshot
Energy-Aware Design Space Exploration for GPGPUs
inferred← citeshttps://doi.org/10.1007/s11227-015-1446-4openalex-snapshot
Optimizing seam carving on multi-GPU systems for real-time content-aware image resizing
inferred← citeshttps://doi.org/10.1088/2053-1591/aa7b13openalex-snapshot
Thermal transport through Zn3P2 nanowire-BN microparticle/nanoparticle composites and hybrids
inferred← citeshttps://doi.org/10.1109/asap.2013.6567571openalex-snapshot
Sparse matrix-vector multiply on the Texas Instruments C6678 Digital Signal Processor
inferred← citeshttps://doi.org/10.1109/fendt.2016.7992003openalex-snapshot
A pre-calculation beamformer design based on FPGA for ultrasound SA imaging
inferred← citeshttps://doi.org/10.1109/hpca.2013.6522337openalex-snapshot
Warped register file: A power efficient register file for GPGPUs
inferred← citeshttps://doi.org/10.1109/iiswc.2013.6704683openalex-snapshot
On the performance and energy-efficiency of multi-core SIMD CPUs and CUDA-enabled GPUs
inferred← citeshttps://doi.org/10.1109/padsw.2014.7097861openalex-snapshot
Optimizing Seam Carving on multi-GPU systems for real-time image resizing
inferred← citeshttps://doi.org/10.1109/tencon58879.2023.10322458openalex-snapshot
Reducing the Carbon Footprint of Ensemble Weather Forecasting with GPUs
inferred← citeshttps://doi.org/10.1109/tuffc.2014.006938openalex-snapshot
Software-based high-level synthesis design of FPGA beamformers for synthetic aperture imaging
inferred← citeshttps://doi.org/10.1145/2636342openalex-snapshot
A Survey of Methods for Analyzing and Improving GPU Energy Efficiency
inferred← citeshttps://doi.org/10.1145/2764967.2764976openalex-snapshot
Plasmon-based Virus Detection on Heterogeneous Embedded Systems
inferred← citeshttps://doi.org/10.1145/3235830.3235834openalex-snapshot
Speedup and Energy Analysis of EEG Classification for BCI Tasks on CPU-GPU Clusters
inferred← citeshttps://doi.org/10.18130/v3tj7xopenalex-snapshot
Improving Resource Utilization in Heterogeneous CPU-GPU Systems
inferred← citeshttps://doi.org/10.21275/sr24309100709openalex-snapshot
Advancing AI: Enhancing Large Language Model Performance through GPU Optimization Techniques
inferred← citeshttps://doi.org/10.23860/thesis-duarte-ronald-2013openalex-snapshot
Improving Performance of Data-Parallel Applications on CPU-GPU Heterogeneous Systems
inferred← citeshttps://doi.org/10.31142/ijtsrd18412openalex-snapshot
Energy Efficient For Cloud Based GPU Using DVFS With Snoopy Protocol
inferred← citeshttps://doi.org/10.32920/ryerson.14661414openalex-snapshot
Performance and energy optimization of heterogeneous CPU-GPU systems for embedded applications
inferred← citeshttps://doi.org/10.32920/ryerson.14661414.v1openalex-snapshot
Performance and energy optimization of heterogeneous CPU-GPU systems for embedded applications
inferred← citeshttps://doi.org/10.3389/fhpcp.2025.1520207openalex-snapshot
Energy-aware operation of HPC systems in Germany
inferred← citeshttps://doi.org/10.4236/ojee.2015.44009openalex-snapshot
Analysis of DVFS Techniques for Improving the GPU Energy Efficiency
inferred← citeshttps://doi.org/10.48550/arxiv.2101.00941openalex-snapshot
Implementing CUDA Streams into AstroAccelerate -- A Case Study
inferred← citeshttps://doi.org/10.70675/3f7377c0z6eedz48b4zb7eezf5aa2e3d1684openalex-snapshot
Méthodes numériques pour la résolution accélérée des systèmes linéaires de grandes tailles sur architectures hybrides massivement parallèles
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