On the public citation graph
ActivePointers: A Case for Software Address Translation on GPUs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1016/s0031-3203(01)00118-2openalex-snapshot
On measuring the distance between histograms
inferredcites →https://doi.org/10.1109/hotchips.2013.7478286openalex-snapshot
Heterogeneous system architecture overview
inferredcites →https://doi.org/10.1109/hotchips.2014.7478810openalex-snapshot
Applying AMD's Kaveri APU for heterogeneous computing
inferredcites →https://doi.org/10.1109/hpca.1997.569652openalex-snapshot
Software-managed address translation
inferredcites →https://doi.org/10.1109/hpca.2014.6835965openalex-snapshot
Supporting x86-64 address translation for 100s of GPU lanes
inferredcites →https://doi.org/10.1109/hpca.2015.7056046openalex-snapshot
Unlocking bandwidth for GPUs in CC-NUMA systems
inferredcites →https://doi.org/10.1109/pact.2013.6618816openalex-snapshot
RSVM: a region-based software virtual memory for GPU
inferredcites →https://doi.org/10.1109/tpami.2008.128openalex-snapshot
80 Million Tiny Images: A Large Data Set for Nonparametric Object and Scene Recognition
inferredcites →https://doi.org/10.1142/s0129626411000187openalex-snapshot
HIGH PERFORMANCE AND SCALABLE RADIX SORTING: A CASE STUDY OF IMPLEMENTING DYNAMIC PARALLELISM FOR GPU COMPUTING
inferredcites →https://doi.org/10.1145/1065887.1065892openalex-snapshot
CCured: type-safe retrofitting of legacy software
inferredcites →https://doi.org/10.1145/1345206.1345220openalex-snapshot
Optimization principles and application performance evaluation of a multithreaded GPU using CUDA
inferredcites →https://doi.org/10.1145/1735970.1736059openalex-snapshot
An asymmetric distributed shared memory model for heterogeneous parallel systems
inferredcites →https://doi.org/10.1145/2093973.2094002openalex-snapshot
Fast GPU-based locality sensitive hashing for k-nearest neighbor computation
inferredcites →https://doi.org/10.1145/2541940.2541942openalex-snapshot
Architectural support for address translation on GPUs
inferredcites →https://doi.org/10.1145/2714064.2660244openalex-snapshot
Region-based memory management for GPU programming languages
inferredcites →https://doi.org/10.1145/2786763.2694381openalex-snapshot
Page Placement Strategies for GPUs within Heterogeneous Memory Systems
inferredcites →https://doi.org/10.1145/2928275.2928276openalex-snapshot
Supporting data-driven I/O on GPUs using GPUfs
inferredcites →https://doi.org/10.1145/997817.997857openalex-snapshot
Locality-sensitive hashing scheme based on p-stable distributions
inferredcites →https://doi.org/10.5555/1924943.1924944openalex-snapshot
An analysis of Linux scalability to many cores
inferredcites →https://doi.org/10.5555/2208461.2208475openalex-snapshot
Shredder: GPU-accelerated incremental storage and computation
inferredcites →https://doi.org/10.5555/2685048.2685065openalex-snapshot
GPUnet: networking abstractions for GPU programs
inferredcites →https://doi.org/10.7916/d82n5935openalex-snapshot
Cryptfs: A Stackable Vnode Level Encryption File System
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-64608-9_1openalex-snapshot
e-CLAS: Effective GPUDirect I/O Classification Scheme
inferred← citeshttps://doi.org/10.1109/hpca.2017.19openalex-snapshot
Supporting Address Translation for Accelerator-Centric Architectures
inferred← citeshttps://doi.org/10.1109/ispass51385.2021.00037openalex-snapshot
Characterizing Massively Parallel Polymorphism
inferred← citeshttps://doi.org/10.1145/3079856.3080209openalex-snapshot
Do-It-Yourself Virtual Memory Translation
inferred← citeshttps://doi.org/10.1145/3123939.3123950openalex-snapshot
Efficient exception handling support for GPUs
inferred← citeshttps://doi.org/10.1145/3140659.3080209openalex-snapshot
Do-It-Yourself Virtual Memory Translation
inferred← citeshttps://doi.org/10.1145/3613424.3614269openalex-snapshot
IDYLL: Enhancing Page Translation in Multi-GPUs via Light Weight PTE Invalidations
inferred← citeshttps://doi.org/10.1145/3620666.3651353openalex-snapshot
GMT: GPU Orchestrated Memory Tiering for the Big Data Era
inferred← citeshttps://doi.org/10.1145/3624062.3624173openalex-snapshot
GPU Graph Processing on CXL-Based Microsecond-Latency External Memory
inferred← citeshttps://doi.org/10.14722/ndss.2019.23327openalex-snapshot
Ginseng: Keeping Secrets in Registers When You Distrust the Operating System
inferred← citeshttps://doi.org/10.5821/dissertation-2117-107939openalex-snapshot
Towards multiprogrammed GPUs
inferred← citeshttps://doi.org/10.5821/dissertation-2117-113684openalex-snapshot
Memory hierarchies for future HPC architectures
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