On the public citation graph

Microarchitectural Protection Against Stack-Based Buffer Overflow Attacks

0 signed · 33 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-36159-6_3openalex-snapshot
Encoding Function Pointers and Memory Arrangement Checking against Buffer Overflow Attack
inferredcites →https://doi.org/10.1007/978-3-540-39881-3_21openalex-snapshot
Enlisting Hardware Architecture to Thwart Malicious Code Injection
inferredcites →https://doi.org/10.1109/12.4607openalex-snapshot
Implementing precise interrupts in pipelined processors
inferredcites →https://doi.org/10.1109/icdsc.2001.918971openalex-snapshot
RAD: a compile-time solution to buffer overflow attacks
inferredcites →https://doi.org/10.1109/micro.1998.742787openalex-snapshot
Improving prediction for procedure returns with return-address-stack repair mechanisms
inferredcites →https://doi.org/10.1109/micro.2004.26openalex-snapshot
Minos: Control Data Attack Prevention Orthogonal to Memory Model
inferredcites →https://doi.org/10.1145/1024393.1024404openalex-snapshot
Secure program execution via dynamic information flow tracking
inferredcites →https://doi.org/10.1145/1055626.1055636openalex-snapshot
Using DISE to protect return addresses from attack
inferredcites →https://doi.org/10.1145/1055626.1055637openalex-snapshot
A reliable return address stack
inferredcites →https://doi.org/10.1145/977091.977139openalex-snapshot
Repairing return address stack for buffer overflow protection

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-1-4419-8080-9_10openalex-snapshot
Security in Embedded Systems
inferred← citeshttps://doi.org/10.1007/978-3-642-33338-5_6openalex-snapshot
A Memory Access Validation Scheme against Payload Injection Attacks
inferred← citeshttps://doi.org/10.1007/s10617-008-9020-4openalex-snapshot
Automated software attack recovery using rollback and huddle
inferred← citeshttps://doi.org/10.1016/j.microrel.2015.07.021openalex-snapshot
ShadowStack: A new approach for secure program execution
inferred← citeshttps://doi.org/10.1016/j.microrel.2019.113413openalex-snapshot
Hardware-based approach to guarantee trusted system boot in embedded systems
inferred← citeshttps://doi.org/10.1109/access.2019.2891762openalex-snapshot
HW-CDI: Hard-Wired Control Data Integrity
inferred← citeshttps://doi.org/10.1109/asap.2007.4459298openalex-snapshot
An Efficient Hardware Support for Control Data Validation
inferred← citeshttps://doi.org/10.1109/asid50160.2020.9271734openalex-snapshot
MiteS: Software-based Microarchitectural Attacks and Countermeasures in networked AP SoC Platforms
inferred← citeshttps://doi.org/10.1109/cisis.2008.136openalex-snapshot
Multi-variant Program Execution: Using Multi-core Systems to Defuse Buffer-Overflow Vulnerabilities
inferred← citeshttps://doi.org/10.1109/cse.2009.49openalex-snapshot
Architectural Support for Automated Software Attack Detection, Recovery, and Prevention
inferred← citeshttps://doi.org/10.1109/dsn.2007.19openalex-snapshot
Augmenting Branch Predictor to Secure Program Execution
inferred← citeshttps://doi.org/10.1109/eit.2009.5189582openalex-snapshot
StackLock with simple FSM
inferred← citeshttps://doi.org/10.1109/iccd.2008.4751907openalex-snapshot
Leveraging speculative architectures for run-time program validation
inferred← citeshttps://doi.org/10.1109/tcad.2020.2984407openalex-snapshot
Hardware Assisted Buffer Protection Mechanisms for Embedded RISC-V
inferred← citeshttps://doi.org/10.1109/tdsc.2014.2355844openalex-snapshot
A Memory-Access Validation Scheme against Payload Injection Attacks
inferred← citeshttps://doi.org/10.1145/2512456openalex-snapshot
Leveraging speculative architectures for runtime program validation
inferred← citeshttps://doi.org/10.15224/978-1-63248-095-8-05openalex-snapshot
Hardware Based Stack Smashing Attack Detection Preliminaries on Recovery Procedure
inferred← citeshttps://doi.org/10.17760/d20003253openalex-snapshot
Architectural support for software security
inferred← citeshttps://doi.org/10.23919/date.2019.8714980openalex-snapshot
FIXER: Flow Integrity Extensions for Embedded RISC-V
inferred← citeshttps://doi.org/10.31274/etd-180810-1470openalex-snapshot
Efficient Validation of Control Flow Integrity for Enhancing Computer System Security
inferred← citeshttps://doi.org/10.31274/rtd-180813-16077openalex-snapshot
Architectural support for secure and survivable embedded software
inferred← citeshttps://doi.org/10.4236/jis.2017.81004openalex-snapshot
Program Counter Encoding for ARM® Architecture
inferred← citeshttps://doi.org/10.5762/kais.2012.13.10.4794openalex-snapshot
Return address stack for protecting from buffer overflow attack
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.