On the public citation graph
Interface-Based Rate Analysis of Embedded Systems
0 signed · 47 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/3-540-45449-7_11openalex-snapshot
Interface Theories for Component-Based Design
inferredcites →https://doi.org/10.1109/18.669170openalex-snapshot
Application of network calculus to guaranteed service networks
inferredcites →https://doi.org/10.1109/2.982917openalex-snapshot
SimpleScalar: an infrastructure for computer system modeling
inferredcites →https://doi.org/10.1109/aspdac.2004.1337553openalex-snapshot
Rate analysis for streaming applications with on-chip buffer constraints
inferredcites →https://doi.org/10.1109/date.2003.1253607openalex-snapshot
A general framework for analysing system properties in platform-based embedded system designs
inferredcites →https://doi.org/10.1109/emrts.2002.1019202openalex-snapshot
Robust media processing in a flexible and cost-effective network of multi-tasking coprocessors
inferredcites →https://doi.org/10.1109/mc.2003.1193230openalex-snapshot
A formal approach to mpsoc performance verification
inferredcites →https://doi.org/10.1109/rtas.2006.23openalex-snapshot
Interface-Based Design of Real-Time Systems with Hierarchical Scheduling
inferredcites →https://doi.org/10.1109/rtcsa.2006.35openalex-snapshot
Generalized Rate Analysis for Media-Processing Platforms
inferredcites →https://doi.org/10.1109/rtss.2005.32openalex-snapshot
Optimal Task Rate Selection in Fixed Priority Systems
inferredcites →https://doi.org/10.1109/tvlsi.2003.820523openalex-snapshot
On-chip traffic modeling and synthesis for MPEG-2 video applications
inferredcites →https://doi.org/10.1145/1016720.1016753openalex-snapshot
Tuning SoC platforms for multimedia processing
inferredcites →https://doi.org/10.1145/1086228.1086246openalex-snapshot
Real-time interfaces for interface-based design of real-time systems with fixed priority scheduling
inferredcites →https://doi.org/10.1145/1118299.1118417openalex-snapshot
Optimal TDMA time slot and cycle length allocation for hard real-time systems
inferredcites →https://doi.org/10.1145/293625.293631openalex-snapshot
Rate analysis for embedded systems
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-030-88304-1_17openalex-snapshot
RTCAnalysis: Practical Modular Performance Analysis of Automotive Systems with RTC
inferred← citeshttps://doi.org/10.1007/978-3-642-16558-0_18openalex-snapshot
An Interface Algebra for Estimating Worst-Case Traversal Times in Component Networks
inferred← citeshttps://doi.org/10.1007/978-3-642-24349-3_4openalex-snapshot
Interface-Based Design of Real-Time Systems
inferred← citeshttps://doi.org/10.1007/s10009-012-0257-7openalex-snapshot
Component-based system design: analytic real-time interfaces for state-based component implementations
inferred← citeshttps://doi.org/10.1007/s10836-013-5397-5openalex-snapshot
Efficient Worst-Case Temperature Evaluation for Thermal-Aware Assignment of Real-Time Applications on MPSoCs
inferred← citeshttps://doi.org/10.1007/s11241-011-9135-8openalex-snapshot
Multiprocessor extensions to real-time calculus
inferred← citeshttps://doi.org/10.1007/s11241-014-9211-yopenalex-snapshot
A formal approach to the WCRT analysis of multicore systems with memory contention under phase-structured task sets
inferred← citeshttps://doi.org/10.1016/j.jss.2012.09.036openalex-snapshot
Design of component-based real-time applications
inferred← citeshttps://doi.org/10.1016/j.sysarc.2010.05.011openalex-snapshot
An overview of interrupt accounting techniques for multiprocessor real-time systems
inferred← citeshttps://doi.org/10.1016/j.sysarc.2012.04.001openalex-snapshot
Compositional real-time models
inferred← citeshttps://doi.org/10.1109/date.2010.5457163openalex-snapshot
A proposal for real-time interfaces in SPEEDS
inferred← citeshttps://doi.org/10.1109/ecrts.2010.35openalex-snapshot
Compositional Analysis of Multi-mode Systems
inferred← citeshttps://doi.org/10.1109/idaacs-sws50031.2020.9297100openalex-snapshot
Timing Analysis of Car-to-Car Communication Systems Using Real-Time Calculus: A Case Study
inferred← citeshttps://doi.org/10.1109/latw.2012.6261246openalex-snapshot
Fast worst-case peak temperature evaluation for real-time applications on multi-core systems
inferred← citeshttps://doi.org/10.1109/mtv.2009.10openalex-snapshot
System-level Performance Verification of Multicore Systems-on-Chip
inferred← citeshttps://doi.org/10.1109/rtcsa.2009.37openalex-snapshot
Accounting for Interrupts in Multiprocessor Real-Time Systems
inferred← citeshttps://doi.org/10.1109/rtss.2007.16openalex-snapshot
Chronos: Feedback Control of a Real Database System Performance
inferred← citeshttps://doi.org/10.1109/rtss.2007.46openalex-snapshot
Composing Functional and State-Based Performance Models for Analyzing Heterogeneous Real-Time Systems
inferred← citeshttps://doi.org/10.1109/rtss.2009.29openalex-snapshot
Multiprocessor Extensions to Real-Time Calculus
inferred← citeshttps://doi.org/10.1145/1450135.1450156openalex-snapshot
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
inferred← citeshttps://doi.org/10.1145/1851340.1851350openalex-snapshot
Using improved resource interfaces to formally describe adaptability in embedded systems
inferred← citeshttps://doi.org/10.1145/2209291.2209294openalex-snapshot
A full lifecycle performance verification methodology for multicore systems-on-chip
inferred← citeshttps://doi.org/10.1145/2304736.2304758openalex-snapshot
An MDE approach to address synchronization needs in component-based real-time systems
inferred← citeshttps://doi.org/10.1145/2593069.2593085openalex-snapshot
An Efficient Real Time Fault Detection and Tolerance Framework Validated on the Intel SCC Processor
inferred← citeshttps://doi.org/10.3929/ethz-a-005328667openalex-snapshot
Modular performance analysis and interface-based design for embedded real-time systems
inferred← citeshttps://doi.org/10.3929/ethz-a-006492384openalex-snapshot
Modular performance analysis of embedded real-time systems: Improving modeling scope and accuracy
inferred← citeshttps://doi.org/10.3929/ethz-a-006543550openalex-snapshot
Compositional design and analysis of distributed, cyclic, and adaptive embedded real-time systems
inferred← citeshttps://doi.org/10.5555/1870926.1871031openalex-snapshot
A proposal for real-time interfaces in SPEEDS
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.