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Real-Time Program Execution on NAND Flash Memory for Portable Media Players
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/11945918_15openalex-snapshot
A Cache-Pinning Strategy for Improving Generational Garbage Collection
inferredcites →https://doi.org/10.1016/j.sysarc.2007.01.010openalex-snapshot
A multi-channel architecture for high-performance NAND flash-based storage system
inferredcites →https://doi.org/10.1109/12.811115openalex-snapshot
Branch prediction, instruction-window size, and cache size: performance trade-offs and simulation techniques
inferredcites →https://doi.org/10.1109/rttas.2002.1137393openalex-snapshot
An adaptive striping architecture for flash memory storage systems of embedded systems
inferredcites →https://doi.org/10.1109/tce.2002.1010143openalex-snapshot
A space-efficient flash translation layer for CompactFlash systems
inferredcites →https://doi.org/10.1109/tce.2006.1649669openalex-snapshot
FAB: Flash-Aware Buffer Management Policy for Portable Media Players
inferredcites →https://doi.org/10.1109/tce.2007.4429239openalex-snapshot
I/O Performance Optimization Techniques for Hybrid Hard Disk-Based Mobile Consumer Devices
inferredcites →https://doi.org/10.1145/1017753.1017775openalex-snapshot
Compiler-assisted demand paging for embedded systems with flash memory
inferredcites →https://doi.org/10.1145/1027794.1027801openalex-snapshot
Real-time garbage collection for flash-memory storage systems of real-time embedded systems
inferredcites →https://doi.org/10.1145/268424.268469openalex-snapshot
Code placement techniques for cache miss rate reduction
inferredcites →https://doi.org/10.1145/339647.339654openalex-snapshot
Completion time multiple branch prediction for enhancing trace cache performance
inferredcites →https://doi.org/10.1145/74925.74953openalex-snapshot
Achieving high instruction cache performance with an optimizing compiler
inferredcites →https://doi.org/10.1145/944645.944684openalex-snapshot
A low-cost memory architecture with NAND XIP for mobile embedded systems
inferredcites →https://doi.org/10.1145/944682.944684openalex-snapshot
A low-cost memory architecture with NAND XIP for mobile embedded systems
inferredcites →https://doi.org/10.5555/320080.320085openalex-snapshot
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What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-642-12510-2_8openalex-snapshot
Key-Study to Execute Code Using Demand Paging and NAND Flash at Smart Card Scale
inferred← citeshttps://doi.org/10.1007/978-3-642-31137-6_17openalex-snapshot
Usage Pattern-Based Prefetching: Quick Application Launch on Mobile Devices
inferred← citeshttps://doi.org/10.1109/cisis.2010.175openalex-snapshot
Impact of Pages Sizes to Execute Code Using Demand Paging and NAND Flash at Smart Card Scale
inferred← citeshttps://doi.org/10.1109/hpcc.2014.57openalex-snapshot
SRFTL: An Adaptive Superblock-Based Real-Time Flash Translation Layer for NAND Flash Memory
inferred← citeshttps://doi.org/10.1109/rtas.2012.27openalex-snapshot
Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems
inferred← citeshttps://doi.org/10.1109/rtcsa.2014.6910536openalex-snapshot
CCM: Low cost dynamic data exchange to emulate RAM on NAND flash
inferred← citeshttps://doi.org/10.1109/rtss.2009.33openalex-snapshot
A Generic Framework for Soft Real-Time Program Executions on NAND Flash Memory in Multi-Tasking Embedded Systems
inferred← citeshttps://doi.org/10.1109/tc.2010.225openalex-snapshot
RT-PLRU: A New Paging Scheme for Real--Time Execution of Program Codes on NAND Flash Memory for Portable Media Players
inferred← citeshttps://doi.org/10.1109/tc.2012.33openalex-snapshot
mRT-PLRU: A General Framework for Real-Time Multitask Executions on NAND Flash Memory
inferred← citeshttps://doi.org/10.1109/tc.2013.70openalex-snapshot
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory
inferred← citeshttps://doi.org/10.1109/tce.2013.6689701openalex-snapshot
A QoS-aware I/O mechanism for jitter-free multimedia playing in smart devices
inferred← citeshttps://doi.org/10.1145/1879021.1879043openalex-snapshot
Using NAND flash memory for executing large volume real-time programs in automotive embedded systems
inferred← citeshttps://doi.org/10.1504/ijes.2014.063814openalex-snapshot
A real-time flash translation layer via adaptive partial garbage collection
inferred← citeshttps://doi.org/10.3745/ktccs.2013.2.6.231openalex-snapshot
A Trace-based Precompile Method for Improving the Response Times of Android Applications
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