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Last-Level Cache Side-Channel Attacks are Practical
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1006/jagm.1997.0913openalex-snapshot
A Survey of Fast Exponentiation Methods
inferredcites →https://doi.org/10.1007/11605805_1openalex-snapshot
Cache Attacks and Countermeasures: The Case of AES
inferredcites →https://doi.org/10.1007/3-540-44709-1_25openalex-snapshot
Universal Exponentiation Algorithm A First Step towards Provable SPA-Resistance
inferredcites →https://doi.org/10.1007/978-0-387-84858-7openalex-snapshot
The Elements of Statistical Learning: Data Mining, Inference, and Prediction
inferredcites →https://doi.org/10.1007/978-3-319-11379-1_15openalex-snapshot
Wait a Minute! A fast, Cross-VM Attack on AES
inferredcites →https://doi.org/10.1007/978-3-540-79263-5_16openalex-snapshot
A Vulnerability in RSA Implementations Due to Instruction Cache Analysis and Its Demonstration on OpenSSL
inferredcites →https://doi.org/10.1007/978-3-642-04101-3openalex-snapshot
Understanding Cryptography: A Textbook For Students And Practitioners
inferredcites →https://doi.org/10.1007/978-3-642-10366-7_39openalex-snapshot
Cache-Timing Template Attacks
inferredcites →https://doi.org/10.1007/978-3-642-15031-9_8openalex-snapshot
New Results on Instruction Cache Attacks
inferredcites →https://doi.org/10.1007/978-3-642-33481-8_9openalex-snapshot
The Security Impact of a New Cryptographic Library
inferredcites →https://doi.org/10.1007/978-3-662-44371-2_25openalex-snapshot
RSA Key Extraction via Low-Bandwidth Acoustic Cryptanalysis
inferredcites →https://doi.org/10.1007/978-3-662-44709-3_5openalex-snapshot
“Ooh Aah... Just a Little Bit” : A Small Amount of Side Channel Can Go a Long Way
inferredcites →https://doi.org/10.1007/978-3-662-48324-4_11openalex-snapshot
Stealing Keys from PCs Using a Radio: Cheap Electromagnetic Attacks on Windowed Exponentiation
inferredcites →https://doi.org/10.1007/s00145-009-9049-yopenalex-snapshot
Efficient Cache Attacks on AES, and Countermeasures
inferredcites →https://doi.org/10.1109/hotos.1997.595186openalex-snapshot
Preventing denial-of-service attacks on a μ-kernel for WebOSes
inferredcites →https://doi.org/10.1109/micro.2008.4771781openalex-snapshot
A novel cache architecture with enhanced performance and security
inferredcites →https://doi.org/10.1109/risp.1991.130768openalex-snapshot
Reducing timing channels with fuzzy time
inferredcites →https://doi.org/10.1109/sp.2011.22openalex-snapshot
Cache Games -- Bringing Access-Based Cache Attacks on AES to Practice
inferredcites →https://doi.org/10.1109/sp.2011.31openalex-snapshot
HomeAlone: Co-residency Detection in the Cloud via Side-Channel Analysis
inferredcites →https://doi.org/10.1109/sp.2013.23openalex-snapshot
Practical Timing Side Channel Attacks against Kernel Space ASLR
inferredcites →https://doi.org/10.1109/sp.2015.42openalex-snapshot
S$A: A Shared Cache Attack That Works across Cores and Defies VM Sandboxing -- and Its Application to AES
inferredcites →https://doi.org/10.1109/tit.1985.1057074openalex-snapshot
A public key cryptosystem and a signature scheme based on discrete logarithms
inferredcites →https://doi.org/10.1111/j.1467-985x.2010.00646_6.xopenalex-snapshot
The Elements of Statistical Learning: Data Mining, Inference, and Prediction
inferredcites →https://doi.org/10.1145/1229285.1266999openalex-snapshot
On the power of simple branch prediction analysis
inferredcites →https://doi.org/10.1145/1250662.1250723openalex-snapshot
New cache designs for thwarting software cache-based side channel attacks
inferredcites →https://doi.org/10.1145/1314466.1314469openalex-snapshot
Yet another MicroArchitectural Attack:
inferredcites →https://doi.org/10.1145/1653662.1653687openalex-snapshot
Hey, you, get off of my cloud
inferredcites →https://doi.org/10.1145/2046660.2046670openalex-snapshot
An exploration of L2 cache covert channels in virtualized environments
inferredcites →https://doi.org/10.1145/2046660.2046671openalex-snapshot
Eliminating fine grained timers in Xen
inferredcites →https://doi.org/10.1145/2382196.2382230openalex-snapshot
Cross-VM side channels and their use to extract private keys
inferredcites →https://doi.org/10.1145/2660267.2660356openalex-snapshot
Cross-Tenant Side-Channel Attacks in PaaS Clouds
inferredcites →https://doi.org/10.1145/357980.358017openalex-snapshot
A method for obtaining digital signatures and public-key cryptosystems
inferredcites →https://doi.org/10.1145/359340.359342openalex-snapshot
A method for obtaining digital signatures and public-key cryptosystems
inferredcites →https://doi.org/10.5860/choice.34-4512openalex-snapshot
Handbook of applied cryptography
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/9781119428497.ch8openalex-snapshot
Certifications Past and Future: A Future Model for Assigning Certifications that Incorporate Lessons Learned from Past Practices
inferred← citeshttps://doi.org/10.1002/ett.3134openalex-snapshot
Survey on covert channels in virtual machines and cloud computing
inferred← citeshttps://doi.org/10.1002/spy2.81openalex-snapshot
A study of hardware architecture based attacks to bypass operating system security
inferred← citeshttps://doi.org/10.1002/stvr.1718openalex-snapshot
An exploration of effective fuzzing for side‐channel cache leakage
inferred← citeshttps://doi.org/10.1007/978-3-030-00024-0_15openalex-snapshot
A Taxonomy of Side Channel Attacks on Critical Infrastructures and Relevant Systems
inferred← citeshttps://doi.org/10.1007/978-3-030-01689-0_9openalex-snapshot
Optimal Partitioning of LLC in CAT-enabled CPUs to Prevent Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-030-01701-9_27openalex-snapshot
Shuffler: Mitigate Cross-VM Side-Channel Attacks via Hypervisor Scheduling
inferred← citeshttps://doi.org/10.1007/978-3-030-12085-6_3openalex-snapshot
Protecting Cloud-Based CIs: Covert Channel Vulnerabilities at the Resource Level
inferred← citeshttps://doi.org/10.1007/978-3-030-12942-2_31openalex-snapshot
Zero in and TimeFuzz: Detection and Mitigation of Cache Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-030-22263-5_80openalex-snapshot
A Survey on Attack Cases Exploiting Computer Architectural Vulnerabilities
inferred← citeshttps://doi.org/10.1007/978-3-030-24265-7_49openalex-snapshot
When Side Channel Becomes Good: Kernel Malware Attack Investigation
inferred← citeshttps://doi.org/10.1007/978-3-030-29611-7_9openalex-snapshot
CBA-Detector: An Accurate Detector Against Cache-Based Attacks Using HPCs and Pintools
inferred← citeshttps://doi.org/10.1007/978-3-030-29959-0_14openalex-snapshot
NetSpectre: Read Arbitrary Memory over Network
inferred← citeshttps://doi.org/10.1007/978-3-030-35055-0_15openalex-snapshot
Can Microkernels Mitigate Microarchitectural Attacks?
inferred← citeshttps://doi.org/10.1007/978-3-030-39303-8_25openalex-snapshot
Low-Noise LLC Side-Channel Attack with Perf
inferred← citeshttps://doi.org/10.1007/978-3-030-58201-2_1openalex-snapshot
Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-core Systems
inferred← citeshttps://doi.org/10.1007/978-3-030-58201-2_3openalex-snapshot
IE-Cache: Counteracting Eviction-Based Cache Side-Channel Attacks Through Indirect Eviction
inferred← citeshttps://doi.org/10.1007/978-3-030-60425-7_6openalex-snapshot
Cloud Computing Security: Hardware-Based Attacks and Countermeasures
inferred← citeshttps://doi.org/10.1007/978-3-030-60939-9_17openalex-snapshot
CHASM: Security Evaluation of Cache Mapping Schemes
inferred← citeshttps://doi.org/10.1007/978-3-030-61638-0_20openalex-snapshot
A Study on Microarchitectural Covert Channel Vulnerabilities in Infrastructure-as-a-Service
inferred← citeshttps://doi.org/10.1007/978-3-030-61638-0_24openalex-snapshot
Applications and Developments of the Lattice Attack in Side Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-030-64448-2_12openalex-snapshot
Software Security with Hardware in Mind
inferred← citeshttps://doi.org/10.1007/978-3-030-65299-9_16openalex-snapshot
On the Cost-Effectiveness of TrustZone Defense on ARM Platform
inferred← citeshttps://doi.org/10.1007/978-3-030-71852-7_15openalex-snapshot
E-SGX: Effective Cache Side-Channel Protection for Intel SGX on Untrusted OS
inferred← citeshttps://doi.org/10.1007/978-3-030-80825-9_14openalex-snapshot
Calibration Done Right: Noiseless Flush+Flush Attacks
inferred← citeshttps://doi.org/10.1007/978-3-030-80825-9_9openalex-snapshot
Aion Attacks: Manipulating Software Timers in Trusted Execution Environment
inferred← citeshttps://doi.org/10.1007/978-3-030-86890-1_18openalex-snapshot
Informer: Protecting Intel SGX from Cross-Core Side Channel Threats
inferred← citeshttps://doi.org/10.1007/978-3-030-88040-8_11openalex-snapshot
An Investigation of Microarchitectural Cache-Based Side-Channel Attacks from a Digital Forensic Perspective: Methods of Exploits and Countermeasures
inferred← citeshttps://doi.org/10.1007/978-3-030-95312-6_12openalex-snapshot
Side-Channeling the Kalyna Key Expansion
inferred← citeshttps://doi.org/10.1007/978-3-030-98795-4_14openalex-snapshot
On Implementation-Level Security of Edge-Based Machine Learning Models
inferred← citeshttps://doi.org/10.1007/978-3-031-06794-5_54openalex-snapshot
Energy Reduction Method by Compiler Optimization
inferred← citeshttps://doi.org/10.1007/978-3-031-09234-3_10openalex-snapshot
RSA Key Recovery from Digit Equivalence Information
inferred← citeshttps://doi.org/10.1007/978-3-031-09484-2_7openalex-snapshot
Branch Different - Spectre Attacks on Apple Silicon
inferred← citeshttps://doi.org/10.1007/978-3-031-15255-9_3openalex-snapshot
Methods of Extracting Parameters of the Processor Caches
inferred← citeshttps://doi.org/10.1007/978-3-031-17244-1_12openalex-snapshot
A Formal Methodology for Verifying Side-Channel Vulnerabilities in Cache Architectures
inferred← citeshttps://doi.org/10.1007/978-3-031-20974-1_9openalex-snapshot
HyperDetector: Detecting, Isolating, and Mitigating Timing Attacks in Virtualized Environments
inferred← citeshttps://doi.org/10.1007/978-3-031-25538-0_7openalex-snapshot
Another Lattice Attack Against ECDSA with the wNAF to Recover More Bits per Signature
inferred← citeshttps://doi.org/10.1007/978-3-031-33491-7_2openalex-snapshot
DMA’n’Play: Practical Remote Attestation Based on Direct Memory Access
inferred← citeshttps://doi.org/10.1007/978-3-031-45395-3_8openalex-snapshot
Microarchitectural Vulnerabilities Introduced, Exploited, and Accelerated by Heterogeneous FPGA-CPU Platforms
inferred← citeshttps://doi.org/10.1007/978-3-031-49187-0_15openalex-snapshot
Protecting Private Keys of Dilithium Using Hardware Transactional Memory
inferred← citeshttps://doi.org/10.1007/978-3-031-51479-1_7openalex-snapshot
MARF: A Memory-Aware CLFLUSH-Based Intra- and Inter-CPU Side-Channel Attack
inferred← citeshttps://doi.org/10.1007/978-3-031-54776-8_13openalex-snapshot
Time Is Money, Friend! Timing Side-Channel Attack Against Garbled Circuit Constructions
inferred← citeshttps://doi.org/10.1007/978-3-031-55829-0_4openalex-snapshot
Characterizing Privacy Risks in Healthcare IoT Systems
inferred← citeshttps://doi.org/10.1007/978-3-031-70903-6_1openalex-snapshot
Cips: The Cache Intrusion Prevention System
inferred← citeshttps://doi.org/10.1007/978-3-031-70903-6_2openalex-snapshot
ReminISCence: Trusted Monitoring Against Privileged Preemption Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-031-71162-6_10openalex-snapshot
Combining Classical and Probabilistic Independence Reasoning to Verify the Security of Oblivious Algorithms
inferred← citeshttps://doi.org/10.1007/978-3-031-73650-6_11openalex-snapshot
WBP: Training-Time Backdoor Attacks Through Hardware-Based Weight Bit Poisoning
inferred← citeshttps://doi.org/10.1007/978-3-031-80408-3_13openalex-snapshot
“There’s Always Another Counter”: Detecting Micro-Architectural Attacks in a Probabilistically Interleaved Malicious/Benign Setting
inferred← citeshttps://doi.org/10.1007/978-3-031-97620-9_10openalex-snapshot
The HMB Timing Side Channel: Exploiting the SSD’s Host Memory Buffer
inferred← citeshttps://doi.org/10.1007/978-3-031-97620-9_9openalex-snapshot
Reverse-Engineering the Address Translation Caches
inferred← citeshttps://doi.org/10.1007/978-3-031-97623-0_11openalex-snapshot
Taming the Linux Memory Allocator for Rapid Prototyping
inferred← citeshttps://doi.org/10.1007/978-3-031-98208-8_19openalex-snapshot
Detecting Speculative Data Flow Vulnerabilities Using Weakest Precondition Reasoning
inferred← citeshttps://doi.org/10.1007/978-3-032-00627-1_6openalex-snapshot
Fast and Efficient Secure L1 Caches for SMT
inferred← citeshttps://doi.org/10.1007/978-3-032-06665-7_21openalex-snapshot
Cache and Speculative Side Channel Attacks: A Comprehensive Review
inferred← citeshttps://doi.org/10.1007/978-3-032-07894-0_15openalex-snapshot
Cache Demote for Fast Eviction Set Construction and Page Table Attribute Leakage
inferred← citeshttps://doi.org/10.1007/978-3-032-07894-0_17openalex-snapshot
T-Time: A Fine-Grained Timing-Based Controlled-Channel Attack Against Intel TDX
inferred← citeshttps://doi.org/10.1007/978-3-032-07894-0_2openalex-snapshot
Systematic Assessment of Cache Timing Vulnerabilities on RISC-V Processors
inferred← citeshttps://doi.org/10.1007/978-3-032-07894-0_4openalex-snapshot
NICraft: Malicious NIC Firmware-Based Cache Side-Channel Attack
inferred← citeshttps://doi.org/10.1007/978-3-032-08124-7_10openalex-snapshot
GIR-Cache: Mitigating Conflict-Based Cache Side-Channel Attacks via Global Indirect Replacement
inferred← citeshttps://doi.org/10.1007/978-3-032-14782-0_17openalex-snapshot
Timing Interference in Multi-core RISC-V Systems: Security Risks and Mitigations
inferred← citeshttps://doi.org/10.1007/978-3-032-17948-7_12openalex-snapshot
Machine Learning and Hardware Security: The Role of AI for Hardware in the Security Era
inferred← citeshttps://doi.org/10.1007/978-3-032-23453-7_4openalex-snapshot
FlipStress: Noise Injection Defenses Against CPU-Cache-Based Web Attacks
inferred← citeshttps://doi.org/10.1007/978-3-032-26740-5_15openalex-snapshot
A Novel Leakage Model in OpenSSL’s Miller-Rabin Primality Test
inferred← citeshttps://doi.org/10.1007/978-3-032-35398-6_8openalex-snapshot
Breaking Optimized HQC: The First Cache-Timing Full Decryption Oracle Key-Recovery Attack in Post-quantum Cryptography
inferred← citeshttps://doi.org/10.1007/978-3-032-38692-2_11openalex-snapshot
A Systematic Look at Quality-of-Service Feature Effects on Side Channels in AMD SEV-SNP
inferred← citeshttps://doi.org/10.1007/978-3-319-26362-5_3openalex-snapshot
Reverse Engineering Intel Last-Level Cache Complex Addressing Using Performance Counters
inferred← citeshttps://doi.org/10.1007/978-3-319-29485-8_13openalex-snapshot
ECDH Key-Extraction via Low-Bandwidth Electromagnetic Attacks on PCs
inferred← citeshttps://doi.org/10.1007/978-3-319-40667-1_14openalex-snapshot
Flush+Flush: A Fast and Stealthy Cache Attack
inferred← citeshttps://doi.org/10.1007/978-3-319-40667-1_15openalex-snapshot
Rowhammer.js: A Remote Software-Induced Fault Attack in JavaScript
inferred← citeshttps://doi.org/10.1007/978-3-319-42836-9_44openalex-snapshot
Toward Exposing Timing-Based Probing Attacks in Web Applications
inferred← citeshttps://doi.org/10.1007/978-3-319-43283-0_2openalex-snapshot
Co-location Detection on the Cloud
inferred← citeshttps://doi.org/10.1007/978-3-319-45719-2_6openalex-snapshot
CloudRadar: A Real-Time Side-Channel Attack Detection System in Clouds
inferred← citeshttps://doi.org/10.1007/978-3-319-48671-0_40openalex-snapshot
Key Recovery in Public Clouds: A Survey on Cross-VM Side Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-319-48965-0_56openalex-snapshot
Moving in Next Door: Network Flooding as a Side Channel in Cloud Environments
inferred← citeshttps://doi.org/10.1007/978-3-319-56614-6_17openalex-snapshot
Modifying an Enciphering Scheme After Deployment
inferred← citeshttps://doi.org/10.1007/978-3-319-60876-1_1openalex-snapshot
Malware Guard Extension: Using SGX to Conceal Cache Attacks
inferred← citeshttps://doi.org/10.1007/978-3-319-66332-6_17openalex-snapshot
Secure In-Cache Execution
inferred← citeshttps://doi.org/10.1007/978-3-319-66399-9_12openalex-snapshot
On-Demand Time Blurring to Support Side-Channel Defense
inferred← citeshttps://doi.org/10.1007/978-3-319-66402-6_25openalex-snapshot
AVR Processors as a Platform for Language-Based Security
inferred← citeshttps://doi.org/10.1007/978-3-319-66787-4_27openalex-snapshot
Sliding Right into Disaster: Left-to-Right Sliding Windows Leak
inferred← citeshttps://doi.org/10.1007/978-3-319-66787-4_4openalex-snapshot
CacheZoom: How SGX Amplifies the Power of Cache Attacks
inferred← citeshttps://doi.org/10.1007/978-3-319-70972-7_13openalex-snapshot
Fantastic Timers and Where to Find Them: High-Resolution Microarchitectural Attacks in JavaScript
inferred← citeshttps://doi.org/10.1007/978-3-319-71501-8_3openalex-snapshot
Tackling the Time-Defence: An Instruction Count Based Micro-architectural Side-Channel Attack on Block Ciphers
inferred← citeshttps://doi.org/10.1007/978-3-319-93387-0_2openalex-snapshot
Distributed SSH Key Management with Proactive RSA Threshold Signatures
inferred← citeshttps://doi.org/10.1007/978-3-319-93387-0_5openalex-snapshot
Drive-By Key-Extraction Cache Attacks from Portable Code
inferred← citeshttps://doi.org/10.1007/978-3-319-97643-3_8openalex-snapshot
Cross-VM Attacks: Attack Taxonomy, Defense Mechanisms, and New Directions
inferred← citeshttps://doi.org/10.1007/978-3-662-48324-4_11openalex-snapshot
Stealing Keys from PCs Using a Radio: Cheap Electromagnetic Attacks on Windowed Exponentiation
inferred← citeshttps://doi.org/10.1007/978-3-662-53140-2_16openalex-snapshot
Flush, Gauss, and Reload – A Cache Attack on the BLISS Lattice-Based Signature Scheme
inferred← citeshttps://doi.org/10.1007/978-3-662-53140-2_17openalex-snapshot
CacheBleed: A Timing Attack on OpenSSL Constant Time RSA
inferred← citeshttps://doi.org/10.1007/978-3-662-53140-2_18openalex-snapshot
Cache Attacks Enable Bulk Key Recovery on the Cloud
inferred← citeshttps://doi.org/10.1007/978-3-662-53140-2_29openalex-snapshot
Curious Case of Rowhammer: Flipping Secret Exponent Bits Using Timing Analysis
inferred← citeshttps://doi.org/10.1007/978-3-662-54455-6_9openalex-snapshot
Security Analysis of Cache Replacement Policies
inferred← citeshttps://doi.org/10.1007/978-981-15-1675-7_7openalex-snapshot
Cache Based Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-981-95-4674-9_21openalex-snapshot
Detecting and Mitigating Conflict-Based Cache Side-Channel Attacks by Monitoring Ping-Pong Accesses Patterns
inferred← citeshttps://doi.org/10.1007/978-981-95-6857-4_2openalex-snapshot
PodBeater: Exploiting Multi-value Affinity for Efficient Co-location Attacks in Kubernetes
inferred← citeshttps://doi.org/10.1007/978-981-95-8617-2_4openalex-snapshot
Foundations of Hardware-Software Leakage Contracts
inferred← citeshttps://doi.org/10.1007/978-981-97-0116-2_3openalex-snapshot
The Principle and Structure of Cyberspace Endogenous Security and Safety
inferred← citeshttps://doi.org/10.1007/978-981-97-1238-0_12openalex-snapshot
Feasibility Analysis and Performance Optimization of the Conflict Test Algorithms for Searching Eviction Sets
inferred← citeshttps://doi.org/10.1007/s10207-024-00893-1openalex-snapshot
Press play, install malware: a study of rhythm game-based malware dropping
inferred← citeshttps://doi.org/10.1007/s10623-025-01596-xopenalex-snapshot
Meet-in-the-middle attack on round-reduced SCARF under single pair-of-tweaks setting
inferred← citeshttps://doi.org/10.1007/s10766-018-0608-4openalex-snapshot
Covert Timing Channels Exploiting Cache Coherence Hardware: Characterization and Defense
inferred← citeshttps://doi.org/10.1007/s10766-018-0609-3openalex-snapshot
PrODACT: Prefetch-Obfuscator to Defend Against Cache Timing Channels
inferred← citeshttps://doi.org/10.1007/s10796-020-10095-4openalex-snapshot
UnderTracker: Generating Robust Binaries Using Execution Flow Traces
inferred← citeshttps://doi.org/10.1007/s11227-022-04694-yopenalex-snapshot
Exploring effective uses of the tagged memory for reducing bounds checking overheads
inferred← citeshttps://doi.org/10.1007/s11227-025-07691-zopenalex-snapshot
GAN-assisted data augmentation to enhance detection accuracy of Evasive Spectre attacks
inferred← citeshttps://doi.org/10.1007/s11277-017-4753-7openalex-snapshot
Preventing from Cross-VM Side-Channel Attack Using New Replacement Method
inferred← citeshttps://doi.org/10.1007/s11390-021-1189-zopenalex-snapshot
Improving Performance of Virtual Machine Covert Timing Channel Through Optimized Run-Length Encoding
inferred← citeshttps://doi.org/10.1007/s11390-021-1249-4openalex-snapshot
Secure Speculation via Speculative Secret Flow Tracking
inferred← citeshttps://doi.org/10.1007/s12046-019-1070-8openalex-snapshot
An error-tolerant approach for efficient AES key retrieval in the presence of cacheprefetching – experiments, results, analysis
inferred← citeshttps://doi.org/10.1007/s12083-020-00996-1openalex-snapshot
An optimistic technique to detect Cache based Side Channel attacks in Cloud
inferred← citeshttps://doi.org/10.1007/s12243-021-00906-3openalex-snapshot
The Kingsguard OS-level mitigation against cache side-channel attacks using runtime detection
inferred← citeshttps://doi.org/10.1007/s13389-016-0141-6openalex-snapshot
A survey of microarchitectural timing attacks and countermeasures on contemporary hardware
inferred← citeshttps://doi.org/10.1007/s13389-017-0152-yopenalex-snapshot
CacheBleed: a timing attack on OpenSSL constant-time RSA
inferred← citeshttps://doi.org/10.1007/s13389-020-00228-5openalex-snapshot
End-to-end automated cache-timing attack driven by machine learning
inferred← citeshttps://doi.org/10.1007/s13389-020-00246-3openalex-snapshot
Adaptive caches as a defense mechanism against cache side-channel attacks
inferred← citeshttps://doi.org/10.1007/s41635-017-0025-yopenalex-snapshot
A Survey of Side-Channel Attacks on Caches and Countermeasures
inferred← citeshttps://doi.org/10.1007/s41635-018-0060-3openalex-snapshot
IPA: an Instruction Profiling–Based Micro-architectural Side-Channel Attack on Block Ciphers
inferred← citeshttps://doi.org/10.1007/s41635-018-0062-1openalex-snapshot
Spy Cartel: Parallelizing Evict+Time-Based Cache Attacks on Last-Level Caches
inferred← citeshttps://doi.org/10.1007/s41635-019-00082-wopenalex-snapshot
“S-Box” Implementation of AES Is Not Side Channel Resistant
inferred← citeshttps://doi.org/10.1007/s41635-020-00095-wopenalex-snapshot
Cache-Zoomer: On-demand High-resolution Cache Monitoring for Security
inferred← citeshttps://doi.org/10.1007/s41635-021-00115-3openalex-snapshot
A Survey on Cache Timing Channel Attacks for Multicore Processors
inferred← citeshttps://doi.org/10.1007/s41635-026-00180-6openalex-snapshot
AISELF: An LLM-based Automated Interleaved Speculative-Execution Leakage Detection Framework
inferred← citeshttps://doi.org/10.1016/j.cels.2021.08.001openalex-snapshot
Privacy-preserving genotype imputation in a trusted execution environment
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Security in hardware assisted virtualization for cloud computing—State of the art issues and challenges
inferred← citeshttps://doi.org/10.1016/j.comnet.2021.108288openalex-snapshot
NFV security survey in 5G networks: A three-dimensional threat taxonomy
inferred← citeshttps://doi.org/10.1016/j.comnet.2021.108407openalex-snapshot
Enhanced cache attack on AES applicable on ARM-based devices with new operating systems
inferred← citeshttps://doi.org/10.1016/j.comnet.2021.108550openalex-snapshot
Cache-based characterization: A low-infrastructure, distributed alternative to network-based traffic and application characterization
inferred← citeshttps://doi.org/10.1016/j.compeleceng.2022.108546openalex-snapshot
A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment
inferred← citeshttps://doi.org/10.1016/j.cose.2019.101711openalex-snapshot
Enclave-based oblivious RAM using Intel’s SGX
inferred← citeshttps://doi.org/10.1016/j.cose.2026.105024openalex-snapshot
A systematic survey of side-channel attack surfaces in Intel TDX
inferred← citeshttps://doi.org/10.1016/j.future.2019.11.003openalex-snapshot
CLOSURE: A cloud scientific workflow scheduling algorithm based on attack–defense game model
inferred← citeshttps://doi.org/10.1016/j.ins.2020.02.031openalex-snapshot
Pbsx: A practical private boolean search using Intel SGX
inferred← citeshttps://doi.org/10.1016/j.is.2020.101524openalex-snapshot
Winter is here! A decade of cache-based side-channel attacks, detection & mitigation for RSA
inferred← citeshttps://doi.org/10.1016/j.jksuci.2021.01.018openalex-snapshot
The recent trends in cyber security: A review
inferred← citeshttps://doi.org/10.1016/j.jnca.2017.06.001openalex-snapshot
Cross-VM cache-based side channel attacks and proposed prevention mechanisms: A survey
inferred← citeshttps://doi.org/10.1016/j.micpro.2015.12.005openalex-snapshot
Multi-dimensional analysis of embedded systems security
inferred← citeshttps://doi.org/10.1016/j.micpro.2016.12.010openalex-snapshot
Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection
inferred← citeshttps://doi.org/10.1016/j.microrel.2021.114085openalex-snapshot
Verifying cache architecture vulnerabilities using a formal security verification flow
inferred← citeshttps://doi.org/10.1016/j.phycom.2022.101602openalex-snapshot
Concealing–restoring system for physical layer data: Based on stochastic filtering theory
inferred← citeshttps://doi.org/10.1016/j.sysarc.2019.101698openalex-snapshot
FLUSH + PREFETCH: A countermeasure against access-driven cache-based side-channel attacks
inferred← citeshttps://doi.org/10.1016/j.sysarc.2021.102252openalex-snapshot
FreqCounter: Efficient Cacheability of Encryption and Integrity Tree Counters in Secure Processors
inferred← citeshttps://doi.org/10.1016/j.sysarc.2024.103107openalex-snapshot
SecurityCloak: Protection against cache timing and speculative memory access attacks
inferred← citeshttps://doi.org/10.1016/j.vlsi.2020.02.004openalex-snapshot
A survey on attack vectors in stack cache memory
inferred← citeshttps://doi.org/10.1038/s41928-024-01312-yopenalex-snapshot
Safe, secure and trustworthy compute-in-memory accelerators
inferred← citeshttps://doi.org/10.1038/s42256-021-00390-3openalex-snapshot
Adversarial interference and its mitigations in privacy-preserving collaborative machine learning
inferred← citeshttps://doi.org/10.1063/5.0118393openalex-snapshot
Survey on software defined networking in IoT
inferred← citeshttps://doi.org/10.1080/02564602.2018.1531072openalex-snapshot
Exploration for Software Mitigation to Spectre Attacks of Poisoning Indirect Branches
inferred← citeshttps://doi.org/10.1080/19393555.2021.1902592openalex-snapshot
Code integrity verification using cache memory monitoring
inferred← citeshttps://doi.org/10.1080/23742917.2025.2565854openalex-snapshot
Classification of cache side-channel attacks using ensemble learning techniques
inferred← citeshttps://doi.org/10.1080/23742917.2026.2720501openalex-snapshot
A CNN-LSTM framework with adversarial robustness and dynamic counter selection for real-time multi-class cache side-channel attack detection
inferred← citeshttps://doi.org/10.1093/bioinformatics/btx193openalex-snapshot
SQC: secure quality control for meta-analysis of genome-wide association studies
inferred← citeshttps://doi.org/10.1109/access.2018.2886372openalex-snapshot
MemWander: Memory Dynamic Remapping via Hypervisor Against Cache-Based Side-Channel Attacks
inferred← citeshttps://doi.org/10.1109/access.2019.2955282openalex-snapshot
Colored Petri Net Based Cache Side Channel Vulnerability Evaluation
inferred← citeshttps://doi.org/10.1109/access.2019.2961158openalex-snapshot
Reinforcing Meltdown Attack by Using a Return Stack Buffer
inferred← citeshttps://doi.org/10.1109/access.2019.2962179openalex-snapshot
Side Channel Attack-Aware Resource Allocation for URLLC and eMBB Slices in 5G RAN
inferred← citeshttps://doi.org/10.1109/access.2020.2980522openalex-snapshot
Meet the Sherlock Holmes’ of Side Channel Leakage: A Survey of Cache SCA Detection Techniques
inferred← citeshttps://doi.org/10.1109/access.2020.2988370openalex-snapshot
WHISPER: A Tool for Run-Time Detection of Side-Channel Attacks
inferred← citeshttps://doi.org/10.1109/access.2020.3006703openalex-snapshot
SofTEE: Software-Based Trusted Execution Environment for User Applications
inferred← citeshttps://doi.org/10.1109/access.2021.3056190openalex-snapshot
Defeating Hardware Prefetchers in Flush+Reload Side-Channel Attack
inferred← citeshttps://doi.org/10.1109/access.2021.3085395openalex-snapshot
Multibyte Microarchitectural Data Sampling and its Application to Session Key Extraction Attacks
inferred← citeshttps://doi.org/10.1109/access.2021.3086304openalex-snapshot
FT-PIP: Flush Task Incorporated Priority-Inheritance Protocol to Reduce Information Leakage on Multiprocessor Real-Time Systems
inferred← citeshttps://doi.org/10.1109/access.2021.3101638openalex-snapshot
Runtime Randomized Relocation of Crypto Libraries for Mitigating Cache Attacks
inferred← citeshttps://doi.org/10.1109/access.2022.3153313openalex-snapshot
MADFAM: MicroArchitectural Data Framework and Methodology
inferred← citeshttps://doi.org/10.1109/access.2022.3154055openalex-snapshot
Partitioned Real-Time Scheduling for Preventing Information Leakage
inferred← citeshttps://doi.org/10.1109/access.2022.3195508openalex-snapshot
A Refinement-Based Approach to Spectre Invulnerability Verification
inferred← citeshttps://doi.org/10.1109/access.2022.3216325openalex-snapshot
GhostLeg: Selective Memory Coalescing for Secure GPU Architecture
inferred← citeshttps://doi.org/10.1109/access.2023.3260179openalex-snapshot
Vizard: Passing Over Profiling-Based Detection by Manipulating Performance Counters
inferred← citeshttps://doi.org/10.1109/access.2023.3275757openalex-snapshot
Microarchitectural Side-Channel Threats, Weaknesses and Mitigations: A Systematic Mapping Study
inferred← citeshttps://doi.org/10.1109/access.2024.3349577openalex-snapshot
On-Device Smishing Classifier Resistant to Text Evasion Attack
inferred← citeshttps://doi.org/10.1109/access.2024.3399601openalex-snapshot
HSP-V: Hypervisor-Less Static Partitioning for RISC-V COTS Platforms
inferred← citeshttps://doi.org/10.1109/access.2025.3555139openalex-snapshot
A Decade in Software-Based Side and Covert Channel Attacks and Countermeasures: A Survey
inferred← citeshttps://doi.org/10.1109/acsac63791.2024.00042openalex-snapshot
No Leakage Without State Change: Repurposing Configurable CPU Exceptions to Prevent Microarchitectural Attacks
inferred← citeshttps://doi.org/10.1109/acsac63791.2024.00044openalex-snapshot
R+R: Demystifying ML-Assisted Side-Channel Analysis Framework: A Case of Image Reconstruction
inferred← citeshttps://doi.org/10.1109/acsac67867.2025.00066openalex-snapshot
Revisiting Prime+Prune+Probe: Pitfalls and Remedies
inferred← citeshttps://doi.org/10.1109/acsac67867.2025.00079openalex-snapshot
Securing On-device Transformer with Hardware Binding and Reversible Obfuscation
inferred← citeshttps://doi.org/10.1109/acsac67867.2025.00083openalex-snapshot
PIM-ORAM: Towards Oblivious RAM Primitives in Commodity Processing-In-Memory
inferred← citeshttps://doi.org/10.1109/aicas51828.2021.9458488openalex-snapshot
Evaluation of Machine Learning-based Detection against Side-Channel Attacks on Autonomous Vehicle
inferred← citeshttps://doi.org/10.1109/aimla67915.2026.11522419openalex-snapshot
Cross-Layer Detection of Stealthy Side-Channel Attacks in Multi-Tenant Clouds with Statistical False-Positive Control
inferred← citeshttps://doi.org/10.1109/allerton.2018.8636050openalex-snapshot
Toward a Protected Cloud Against Side Channel Attacks: A Game-Theoretic Framework
inferred← citeshttps://doi.org/10.1109/asianhost59942.2023.10409342openalex-snapshot
Overtake: Achieving Meltdown-type Attacks with One Instruction
inferred← citeshttps://doi.org/10.1109/asp-dac52403.2022.9712572openalex-snapshot
SC-K9: A Self-synchronizing Framework to Counter Micro-architectural Side Channels
inferred← citeshttps://doi.org/10.1109/asp-dac66049.2026.11420280openalex-snapshot
PIR-Cache: Mitigating Conflict-Based Cache Side-Channel Attacks via Partial Indirect Replacement
inferred← citeshttps://doi.org/10.1109/cahpc.2018.8645918openalex-snapshot
Online Detection of Spectre Attacks Using Microarchitectural Traces from Performance Counters
inferred← citeshttps://doi.org/10.1109/ccgrid.2017.137openalex-snapshot
IT Security and Privacy Standards in Comparison: Improving FedRAMP Authorization for Cloud Service Providers
inferred← citeshttps://doi.org/10.1109/ccgrid.2018.00046openalex-snapshot
Secure and Dynamic Core and Cache Partitioning for Safe and Efficient Server Consolidation
inferred← citeshttps://doi.org/10.1109/ccpqt56151.2022.00010openalex-snapshot
Research on Security Technology of Processor Branch Prediction
inferred← citeshttps://doi.org/10.1109/cloud.2017.16openalex-snapshot
Cloud Standards in Comparison: Are New Security Frameworks Improving Cloud Security?
inferred← citeshttps://doi.org/10.1109/cloud.2018.00099openalex-snapshot
It's Time to Migrate! A Game-Theoretic Framework for Protecting a Multi-Tenant Cloud against Collocation Attacks
inferred← citeshttps://doi.org/10.1109/cloud60044.2023.00040openalex-snapshot
Making Your Program Oblivious: A Comparative Study for Side-channel-Safe Confidential Computing
inferred← citeshttps://doi.org/10.1109/cloudcom2018.2018.00042openalex-snapshot
QuantiC: Distance Metrics for Evaluating Multi-Tenancy Threats in Public Cloud
inferred← citeshttps://doi.org/10.1109/compcomm.2018.8780825openalex-snapshot
Interference-based VM Migration to Mitgate Cache-based Side-channel Attacks in Cloud
inferred← citeshttps://doi.org/10.1109/compsac.2019.00086openalex-snapshot
Information Exposure (IEX): A New Class in the Bugs Framework (BF)
inferred← citeshttps://doi.org/10.1109/compsac.2019.00090openalex-snapshot
Detecting Malicious Attacks Exploiting Hardware Vulnerabilities Using Performance Counters
inferred← citeshttps://doi.org/10.1109/csci46756.2018.00255openalex-snapshot
A Review of Virtualization, Hypervisor and VM Allocation Security: Threats, Vulnerabilities, and Countermeasures
inferred← citeshttps://doi.org/10.1109/cscwd54268.2022.9776255openalex-snapshot
Detection of Hardware-Assisted Virtualization Based on Low-Level Feature
inferred← citeshttps://doi.org/10.1109/csf.2019.00027openalex-snapshot
A Formal Approach to Secure Speculation
inferred← citeshttps://doi.org/10.1109/cybersecpods.2019.8885375openalex-snapshot
Secure Chaotic Maps-based Authentication Scheme for Real-Time Data Access In Internet of Things
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