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Efficient Hardware/Software Partitioning Approach for Embedded Multiprocessor Systems

https://doi.org/10.1109/vdat.2006.258167
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-1-4757-5388-2openalex-snapshot
Hardware-Software Co-Synthesis of Distributed Embedded Systems
inferredcites →https://doi.org/10.1016/0167-8191(94)90009-4openalex-snapshot
Numerical experiences with partitioning of unstructured meshes
inferredcites →https://doi.org/10.1016/0956-0521(91)90014-vopenalex-snapshot
Partitioning of unstructured problems for parallel processing
inferredcites →https://doi.org/10.1109/dac.1999.781296openalex-snapshot
A low power hardware/software partitioning approach for core-based embedded systems
inferredcites →https://doi.org/10.1109/iccad.1997.643588openalex-snapshot
Hardware/software partitioning for multi-function systems
inferredcites →https://doi.org/10.1145/266021.266323openalex-snapshot
A hardware/software partitioner using a dynamically determined granularity
inferredcites →https://doi.org/10.1145/581630.581670openalex-snapshot
HW / SW partitioning approach for reconfigurable system design

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-0-387-74935-8_28openalex-snapshot
Partitioning Strategy for Embedded Multiprocessor FPGA Systems
inferred← citeshttps://doi.org/10.1007/s10617-010-9068-9openalex-snapshot
An integrated high-level hardware/software partitioning methodology
inferred← citeshttps://doi.org/10.1007/s10766-013-0283-4openalex-snapshot
Power Efficiency for Hardware/Software Partitioning with Time and Area Constraints on MPSoC
inferred← citeshttps://doi.org/10.1016/j.asoc.2013.10.032openalex-snapshot
Multi-objective hardware–software partitioning of embedded systems: A case study of JPEG encoder
inferred← citeshttps://doi.org/10.1016/j.micpro.2010.04.002openalex-snapshot
Integrating real-time inter-task communication channels into hardware–software codesign
inferred← citeshttps://doi.org/10.1016/j.micpro.2017.09.002openalex-snapshot
PGMA: An algorithmic approach for multi-objective hardware software partitioning
inferred← citeshttps://doi.org/10.1109/aset.2017.7983684openalex-snapshot
Hardware/software partitioning heuristics approaches
inferred← citeshttps://doi.org/10.1109/icicic.2008.505openalex-snapshot
Sophisticated Computation of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems
inferred← citeshttps://doi.org/10.1109/iihmsp.2007.4457483openalex-snapshot
Enhancement of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems
inferred← citeshttps://doi.org/10.1109/ipdps.2008.4536569openalex-snapshot
Automated generation of explicit connectors for component based hardware/software interaction in embedded real-time systems
inferred← citeshttps://doi.org/10.1155/2014/718348openalex-snapshot
Energy Efficiency of Task Allocation for Embedded JPEG Systems
inferred← citeshttps://doi.org/10.4156/aiss.vol3.issue3.5openalex-snapshot
Grey Relational Hardware-Software Partitioning for Embedded Multiprocessor FPGA Systems
inferred← citeshttps://doi.org/10.5772/6740openalex-snapshot
Particle Swarm Optimization for HW/SW Partitioning
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