On the public citation graph

YASK—Yet Another Stencil Kernel: A Framework for HPC Stencil Code-Generation and Tuning

https://doi.org/10.1109/wolfhpc.2016.08

0 signed · 72 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.

Claim with ORCID

Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.

See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-642-03869-3_61openalex-snapshot

A Multilevel Parallelization Framework for High-Order Stencil Computations

inferredcites →https://doi.org/10.1007/s11227-007-0111-yopenalex-snapshot

The memory behavior of cache oblivious stencil computations

inferredcites →https://doi.org/10.1016/b978-0-12-802118-7.00023-6openalex-snapshot

Characterization and Optimization Methodology Applied to Stencil Computations

inferredcites →https://doi.org/10.1109/hpcc-css-icess.2015.27openalex-snapshot

Vector Folding: Improving Stencil Performance via Multi-dimensional SIMD-vector Representation

inferredcites →https://doi.org/10.1109/ipdps.2009.5161011openalex-snapshot

High-order stencil computations on multicore clusters

inferredcites →https://doi.org/10.1109/pmbs.2016.012openalex-snapshot

Effective Use of Large High-Bandwidth Memory Caches in HPC Stencil Computation via Temporal Wave-Front Tiling

inferredcites →https://doi.org/10.1109/sc.2008.5222004openalex-snapshot

Stencil computation optimization and auto-tuning on state-of-the-art multicore architectures

inferredcites →https://doi.org/10.1109/sc.2010.45openalex-snapshot

Scalable Earthquake Simulation on Petascale Supercomputers

inferredcites →https://doi.org/10.1109/sc.companion.2012.136openalex-snapshot

Towards Domain-Specific Computing for Stencil Codes in HPC

inferredcites →https://doi.org/10.1145/1178597.1178605openalex-snapshot

Implicit and explicit optimizations for stencil computations

inferredcites →https://doi.org/10.1145/1375581.1375595openalex-snapshot

A practical automatic polyhedral parallelizer and locality optimizer

inferredcites →https://doi.org/10.1145/2063384.2063398openalex-snapshot

Physis

inferredcites →https://doi.org/10.1145/2304576.2304619openalex-snapshot

High-performance code generation for stencil computations on GPU architectures

inferredcites →https://doi.org/10.1145/2491956.2462176openalex-snapshot

Halide

inferredcites →https://doi.org/10.1145/2503210.2503300openalex-snapshot

Physics-based seismic hazard analysis on petascale heterogeneous supercomputers

inferredcites →https://doi.org/10.1145/2830018.2830025openalex-snapshot

SDSLc

inferredcites →https://doi.org/10.5860/choice.27-0936openalex-snapshot

Genetic algorithms in search, optimization, and machine learning

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-030-34356-9_13openalex-snapshot

Scalable Parallelization of Stencils Using MODA

inferred← citeshttps://doi.org/10.1007/978-3-030-36592-9_5openalex-snapshot

GPU Implementation of a Stencil Code with More Than 90% of the Peak Theoretical Performance

inferred← citeshttps://doi.org/10.1007/978-3-030-41005-6_16openalex-snapshot

GPU Support for Automatic Generation of Finite-Differences Stencil Kernels

inferred← citeshttps://doi.org/10.1007/978-3-030-43229-4_17openalex-snapshot

Early Performance Assessment of the ThunderX2 Processor for Lattice Based Simulations

inferred← citeshttps://doi.org/10.1007/978-3-030-50743-5_19openalex-snapshot

Offsite Autotuning Approach

inferred← citeshttps://doi.org/10.1007/978-3-319-58667-0_8openalex-snapshot

Accelerating Seismic Simulations Using the Intel Xeon Phi Knights Landing Processor

inferred← citeshttps://doi.org/10.1007/s11227-019-02842-5openalex-snapshot

Using Arm’s scalable vector extension on stencil codes

inferred← citeshttps://doi.org/10.1007/s11432-022-3727-6openalex-snapshot

Building a domain-specific compiler for emerging processors with a reusable approach

inferred← citeshttps://doi.org/10.1007/s42514-023-00147-xopenalex-snapshot

Adapting combined tiling to stencil optimizations on sunway processor

inferred← citeshttps://doi.org/10.1016/j.future.2017.10.041openalex-snapshot

Multi-level spatial and temporal tiling for efficient HPC stencil computation on many-core processors with large shared caches

inferred← citeshttps://doi.org/10.1016/j.jocs.2022.101664openalex-snapshot

Automated generation of High-Performance Computational Fluid Dynamics Codes

inferred← citeshttps://doi.org/10.1021/acs.jctc.1c00237openalex-snapshot

Space-Filling Curves for Real-Space Electronic Structure Calculations

inferred← citeshttps://doi.org/10.1109/cgo51591.2021.9370316openalex-snapshot

YaskSite: Stencil Optimization Techniques Applied to Explicit ODE Methods on Modern Architectures

inferred← citeshttps://doi.org/10.1109/cgo68049.2026.11394846openalex-snapshot

LEGO: A Layout Expression Language for Code Generation of Hierarchical Mapping

inferred← citeshttps://doi.org/10.1109/cluster48925.2021.00037openalex-snapshot

csTuner: Scalable Auto-tuning Framework for Complex Stencil Computation on GPUs

inferred← citeshttps://doi.org/10.1109/hpec58863.2023.10363547openalex-snapshot

ProtoX: A First Look

inferred← citeshttps://doi.org/10.1109/ipdps.2017.102openalex-snapshot

Autotuning Stencil Computations with Structural Ordinal Regression Learning

inferred← citeshttps://doi.org/10.1109/ipdps53621.2022.00069openalex-snapshot

An Efficient Vectorization Scheme for Stencil Computation

inferred← citeshttps://doi.org/10.1109/ipdps64566.2025.00066openalex-snapshot

Accelerating the Dutch Atmospheric Large-Eddy Simulation (DALES) Model with OpenACC

inferred← citeshttps://doi.org/10.1109/ipdpsw.2018.00027openalex-snapshot

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL

inferred← citeshttps://doi.org/10.1109/ipdpsw.2018.00158openalex-snapshot

Performance Optimization of Fully Anisotropic Elastic Wave Propagation on 2nd Generation Intel® Xeon Phi(TM) Processors

inferred← citeshttps://doi.org/10.1109/jproc.2018.2862896openalex-snapshot

Domain-Specific Optimization and Generation of High-Performance GPU Code for Stencil Computations

inferred← citeshttps://doi.org/10.1109/p3hpc.2018.00009openalex-snapshot

Delivering Performance-Portable Stencil Computations on CPUs and GPUs Using Bricks

inferred← citeshttps://doi.org/10.1109/pmbs.2016.012openalex-snapshot

Effective Use of Large High-Bandwidth Memory Caches in HPC Stencil Computation via Temporal Wave-Front Tiling

inferred← citeshttps://doi.org/10.1109/sc41406.2024.00026openalex-snapshot

Moirae: Generating High-Performance Composite Stencil Programs with Global Optimizations

inferred← citeshttps://doi.org/10.1109/sc41406.2024.00059openalex-snapshot

LoRAStencil: Low-Rank Adaptation of Stencil Computation on Tensor Cores

inferred← citeshttps://doi.org/10.1109/scw63240.2024.00159openalex-snapshot

High-Performance, Scalable Geometric Multigrid via Fine-Grain Data Blocking for GPUs

inferred← citeshttps://doi.org/10.1109/scw63240.2024.00215openalex-snapshot

A Performance-Portable MultiGPU Implementation of 3D Euler Equations using ProtoX and IRIS

inferred← citeshttps://doi.org/10.1109/tpds.2025.3650515openalex-snapshot

SMEStencil: Optimizing High-Order Stencils on ARM Multicore Using SME Unit

inferred← citeshttps://doi.org/10.1145/3295500.3356186openalex-snapshot

Code generation for massively parallel phase-field simulations

inferred← citeshttps://doi.org/10.1145/3295500.3356210openalex-snapshot

Exploiting reuse and vectorization in blocked stencil computations on CPUs and GPUs

inferred← citeshttps://doi.org/10.1145/3368826.3377904openalex-snapshot

AN5D: automated stencil framework for high-degree temporal blocking on GPUs

inferred← citeshttps://doi.org/10.1145/3374916openalex-snapshot

Architecture and Performance of Devito, a System for Automated Stencil Computation

inferred← citeshttps://doi.org/10.1145/3437801.3441598openalex-snapshot

Improving communication by optimizing on-node data movement with data layout

inferred← citeshttps://doi.org/10.1145/3447818.3461665openalex-snapshot

Inter-loop optimization in RAJA using loop chains

inferred← citeshttps://doi.org/10.1145/3458817.3476149openalex-snapshot

Temporal vectorization for stencils

inferred← citeshttps://doi.org/10.1145/3458817.3476154openalex-snapshot

Reducing redundancy in data organization and arithmetic calculation for stencil computations

inferred← citeshttps://doi.org/10.1145/3472456.3473517openalex-snapshot

Automatic Code Generation and Optimization of Large-scale Stencil Computation on Many-core Processors

inferred← citeshttps://doi.org/10.1145/3524059.3532392openalex-snapshot

Toward accelerated stencil computation by adapting tensor core unit on GPU

inferred← citeshttps://doi.org/10.1145/3620666.3651344openalex-snapshot

A shared compilation stack for distributed-memory parallelism in stencil DSLs

inferred← citeshttps://doi.org/10.1145/3624062.3624177openalex-snapshot

Performance Portability Evaluation of Blocked Stencil Computations on GPUs

inferred← citeshttps://doi.org/10.1145/3649169openalex-snapshot

Proceedings of the 15th International Workshop on Programming Models and Applications for Multicores and Manycores

inferred← citeshttps://doi.org/10.1145/3649169.3649245openalex-snapshot

Parallel Pattern Language Code Generation

inferred← citeshttps://doi.org/10.1145/3673038.3673046openalex-snapshot

BrickDL: Graph-Level Optimizations for DNNs with Fine-Grained Data Blocking on GPUs

inferred← citeshttps://doi.org/10.1145/3698038.3698560openalex-snapshot

FAAStloop: Optimizing Loop-Based Applications for Serverless Computing

inferred← citeshttps://doi.org/10.1145/3710848.3710886openalex-snapshot

Jigsaw: Toward Conflict-free Vectorized Stencil Computation by Tessellating Swizzled Registers

inferred← citeshttps://doi.org/10.1145/3721145.3725760openalex-snapshot

Efficient Locality-aware Instruction Stream Scheduling for Stencil Computation on ARM Processors

inferred← citeshttps://doi.org/10.1145/3797905.3807849openalex-snapshot

WindStencil: Unleashing GPU Potential for High-Order Stencil Computation in High-Performance Inviscid CFD Simulations

inferred← citeshttps://doi.org/10.1177/10943420241268288openalex-snapshot

Bricks: A high-performance portability layer for computations on block-structured grids

inferred← citeshttps://doi.org/10.25080/shinma-7f4c6e7-000openalex-snapshot

Proceedings of the 16th Python in Science Conference

inferred← citeshttps://doi.org/10.25080/shinma-7f4c6e7-00dopenalex-snapshot

Optimised finite difference computation from symbolic equations

inferred← citeshttps://doi.org/10.3997/2214-4609.201700497openalex-snapshot

Optimizing Fully Anisotropic Elastic Propagation on 2nd Generation Intel Xeon Phi Processors

inferred← citeshttps://doi.org/10.5821/dissertation-2117-413349openalex-snapshot

Towards a domain specific language for computational fluid dynamics in HPC

inferred← citeshttps://doi.org/10.70675/dc9bbce7zf29dz4cb8zafc2z7735c041192copenalex-snapshot

Code generation in a lattice Boltzmann framework for exascale computing

inferred← citeshttps://doi.org/10.70675/eb413d52z4e62z4a69zae52z3a63b645c812openalex-snapshot

Automating the derivation of memory allocations for acceleration of polyhedral programs

Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.