On the public citation graph

C.mmp

0 signed · 226 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-1-4757-3472-0_2openalex-snapshot
Cooperating Sequential Processes
inferredcites →https://doi.org/10.1109/t-c.1972.223548openalex-snapshot
The Description and Use of Register-Transfer Modules (RTM's)®
inferredcites →https://doi.org/10.1145/1463822.1463838openalex-snapshot
A multiprocessor system design
inferredcites →https://doi.org/10.1145/1476936.1477037openalex-snapshot
A new architecture for mini-computers
inferredcites →https://doi.org/10.1145/361598.361623openalex-snapshot
On the criteria to be used in decomposing systems into modules
inferredcites →https://doi.org/10.1145/362919.362936openalex-snapshot
BLISS
inferredcites →https://doi.org/10.1184/r1/6591380openalex-snapshot
A software laboratory preliminary report
inferredcites →https://doi.org/10.21236/ad0737531openalex-snapshot
C.ai: A Computing Environment for AI Research. Overview, PMS and Operating System Considerations

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/0471028959.sof581openalex-snapshot
Wulf, William A.
inferred← citeshttps://doi.org/10.1006/ijhc.1980.0310openalex-snapshot
The ZOG approach to man-machine communication
inferred← citeshttps://doi.org/10.1006/jpdc.1996.0002openalex-snapshot
Cache-Based Synchronization in Shared Memory Multiprocessors
inferred← citeshttps://doi.org/10.1007/3-540-07141-5_246openalex-snapshot
On Classification Schemes for Computer Systems in the Post-Von-Neumann-Era
inferred← citeshttps://doi.org/10.1007/3-540-18203-9_3openalex-snapshot
Fine-grain parallel computing: The dataflow approach
inferred← citeshttps://doi.org/10.1007/3-540-60222-4_125openalex-snapshot
DFS-superMPx: Low-cost parallel processing system for machine vision and image processing
inferred← citeshttps://doi.org/10.1007/978-1-4020-8157-6_25openalex-snapshot
Experimental Research in Dependable Computing at Carnegie Mellon University
inferred← citeshttps://doi.org/10.1007/978-1-4419-8423-4_6openalex-snapshot
DPE for Problem Solving
inferred← citeshttps://doi.org/10.1007/978-1-4612-5517-8openalex-snapshot
Studies in Ada Style
inferred← citeshttps://doi.org/10.1007/978-1-4613-3027-1_10openalex-snapshot
Computer Architectures for Vision
inferred← citeshttps://doi.org/10.1007/978-1-4684-6357-6_8openalex-snapshot
Ensemble Architectures and their Algorithms: An Overview
inferred← citeshttps://doi.org/10.1007/978-1-4757-0546-1_13openalex-snapshot
Computer as a research tool in speech-understanding systems research
inferred← citeshttps://doi.org/10.1007/978-3-642-46604-5_7openalex-snapshot
Distributed Computing System Architectures : Hardware
inferred← citeshttps://doi.org/10.1007/978-3-642-69394-6_13openalex-snapshot
MICON — Ein Bausteinsystem für freikonfigurierbare Rechnernetze
inferred← citeshttps://doi.org/10.1007/978-3-642-78348-7_7openalex-snapshot
The KSR1: High Performance and Ease of Programming, No Longer an Oxymoron
inferred← citeshttps://doi.org/10.1007/978-3-642-82150-9_6openalex-snapshot
The PASM System and Parallel Image Processing
inferred← citeshttps://doi.org/10.1007/978-3-642-82447-0_7openalex-snapshot
Reconfigurable Modular Architecture for a Man-Machine Vocal Communication System in Real Time
inferred← citeshttps://doi.org/10.1007/978-3-642-95289-0_3openalex-snapshot
ADV-Systementwicklung und Organisation der Aufgabenerfüllung
inferred← citeshttps://doi.org/10.1007/978-3-662-39812-8_1openalex-snapshot
Parallel Computation and Optimisation
inferred← citeshttps://doi.org/10.1007/978-3-7091-8596-4_14openalex-snapshot
Models to Describe Those Features of Cellular Computer Nets Which Are Relevant to the Operating System
inferred← citeshttps://doi.org/10.1007/978-3-7091-8871-2_13openalex-snapshot
Experimental Research in Reliable Computing at Carnegie Mellon University
inferred← citeshttps://doi.org/10.1007/978-90-481-9216-8_2openalex-snapshot
Towards High-Performance and Energy-Efficient Multi-core Processors
inferred← citeshttps://doi.org/10.1007/978-94-010-1226-3_1openalex-snapshot
What Have We Learned from the PDP-11?
inferred← citeshttps://doi.org/10.1007/bf00288655openalex-snapshot
Some resource allocation policies in a Multi Associative Processor
inferred← citeshttps://doi.org/10.1007/bf01085188openalex-snapshot
Methods and means of parallel processing of information
inferred← citeshttps://doi.org/10.1007/bf01575749openalex-snapshot
Parallel solutions of load flow problems
inferred← citeshttps://doi.org/10.1016/0097-8493(77)90031-0openalex-snapshot
Concurrent processing for computer graphics
inferred← citeshttps://doi.org/10.1016/0141-9331(79)90158-3openalex-snapshot
Evolution in dynamic architectures
inferred← citeshttps://doi.org/10.1016/0165-6074(82)90118-1openalex-snapshot
A monitoring distributed system
inferred← citeshttps://doi.org/10.1016/0165-6074(84)90047-4openalex-snapshot
An alternative approach to multiprocessor design
inferred← citeshttps://doi.org/10.1016/0165-6074(89)90279-2openalex-snapshot
Arbiter designs for multiprocessor interconnection networks
inferred← citeshttps://doi.org/10.1016/0167-8191(85)90024-9openalex-snapshot
MIMD computing in the USA—1984
inferred← citeshttps://doi.org/10.1016/0303-1268(76)90018-3openalex-snapshot
Distributed computing systems: A biased review
inferred← citeshttps://doi.org/10.1016/0743-7315(84)90012-1openalex-snapshot
Performance enhancement in buffered delta networks using crossbar switches and multiple links
inferred← citeshttps://doi.org/10.1016/0743-7315(87)90026-8openalex-snapshot
Analysis of interconnection networks with different arbiter designs
inferred← citeshttps://doi.org/10.1016/0743-7315(87)90028-1openalex-snapshot
A distributed process manager for an engineering network computer
inferred← citeshttps://doi.org/10.1016/0743-7315(90)90101-topenalex-snapshot
Performance of multiple-bus interconnections for multiprocessors
inferred← citeshttps://doi.org/10.1016/b978-0-08-024008-4.50010-0openalex-snapshot
Computers: Large, Medium and Small
inferred← citeshttps://doi.org/10.1016/b978-0-08-034347-1.50006-1openalex-snapshot
Fluide: An Operating Environment for Extensible Multiprocessors
inferred← citeshttps://doi.org/10.1016/b978-0-12-389450-2.50015-3openalex-snapshot
C.mmp: A Progress Report on Synergistic Research
inferred← citeshttps://doi.org/10.1016/b978-0-12-442350-3.50006-7openalex-snapshot
A DESIGN APPROACH FOR MULTIPLE PROCESSOR COMPUTERS
inferred← citeshttps://doi.org/10.1016/b978-0-12-528540-7.50017-4openalex-snapshot
MINICOMPUTER COMPLEXES: PROGRESS AND PROSPECTS
inferred← citeshttps://doi.org/10.1016/b978-1-55558-075-9.50025-9openalex-snapshot
REFERENCES
inferred← citeshttps://doi.org/10.1016/s0065-2458(00)80004-2openalex-snapshot
Shared memory and distributed shared memory systems: A survey
inferred← citeshttps://doi.org/10.1016/s0065-2458(08)60033-9openalex-snapshot
The Structure of Parallel Algorithms
inferred← citeshttps://doi.org/10.1016/s0065-2458(08)60546-xopenalex-snapshot
Cache Coherence in Multiprocessors: A Survey
inferred← citeshttps://doi.org/10.1080/03155986.1980.11731796openalex-snapshot
A Distributed Host-Satellite System For List-Processing Programs‡
inferred← citeshttps://doi.org/10.1109/12.55702openalex-snapshot
Markovian queueing network models for performance analysis of a single-bus multiprocessor system
inferred← citeshttps://doi.org/10.1109/12.559810openalex-snapshot
Design and analysis of high performance multistage interconnection networks
inferred← citeshttps://doi.org/10.1109/12.8735openalex-snapshot
Resource sharing interconnection networks in multiprocessors
inferred← citeshttps://doi.org/10.1109/5.747862openalex-snapshot
DSM perspective: another point of view
inferred← citeshttps://doi.org/10.1109/52.589244openalex-snapshot
Classifying software-based cache coherence solutions
inferred← citeshttps://doi.org/10.1109/71.113080openalex-snapshot
Design and analysis of a scalable cache coherence scheme based on clocks and timestamps
inferred← citeshttps://doi.org/10.1109/71.850834openalex-snapshot
Hardware and compiler-directed cache coherence in large-scale multiprocessors: Design considerations and performance study
inferred← citeshttps://doi.org/10.1109/c-m.1981.220298openalex-snapshot
The Multistage Cube: A Versatile Interconnection Network
inferred← citeshttps://doi.org/10.1109/c-m.1981.220330openalex-snapshot
Using the Augmented Data Manipulator Network in PASM
inferred← citeshttps://doi.org/10.1109/cdc.1991.261433openalex-snapshot
Performance analysis of multibus multiprocessor systems
inferred← citeshttps://doi.org/10.1109/cmpsac.1978.810489openalex-snapshot
Computer communication techniques
inferred← citeshttps://doi.org/10.1109/cmpsac.1978.810522openalex-snapshot
A survey of communication processor systems
inferred← citeshttps://doi.org/10.1109/cmpsac.1978.810566openalex-snapshot
Software problems for dynamic architectures: Adaptive assignment of hardware resources
inferred← citeshttps://doi.org/10.1109/cmpsac.1978.810567openalex-snapshot
On some parallel programming techniques
inferred← citeshttps://doi.org/10.1109/cmpsac.1978.810568openalex-snapshot
A survey and methodology of reconfigurable multi-module systems
inferred← citeshttps://doi.org/10.1109/empdp.2004.1271430openalex-snapshot
The effect of the degree of multistage interconnection networks on their performance: the case of delta and over-sized delta networks
inferred← citeshttps://doi.org/10.1109/hicss.1989.47166openalex-snapshot
The limits of incremental multiprocessors
inferred← citeshttps://doi.org/10.1109/hicss.1995.375386openalex-snapshot
A survey of software solutions for maintenance of cache consistency in shared memory multiprocessors
inferred← citeshttps://doi.org/10.1109/icde.2019.00008openalex-snapshot
AsterixDB Mid-Flight: A Case Study in Building Systems in Academia
inferred← citeshttps://doi.org/10.1109/icpp.1999.797400openalex-snapshot
Performance and architectural features of segmented multiple bus system
inferred← citeshttps://doi.org/10.1109/isca.1990.134504openalex-snapshot
Synchronization with multiprocessor caches
inferred← citeshttps://doi.org/10.1109/mark.1979.8817082openalex-snapshot
PM4—A reconfigurable multiprocessor system for pattern recognition and image processing
inferred← citeshttps://doi.org/10.1109/mark.1979.8817086openalex-snapshot
Adaptation properties for dynamic architectures
inferred← citeshttps://doi.org/10.1109/mc.1973.6539089openalex-snapshot
Some observations on semiconductor technology and the architecture of large digital modules
inferred← citeshttps://doi.org/10.1109/mc.1984.1658960openalex-snapshot
Computer Architecture
inferred← citeshttps://doi.org/10.1109/mc.1985.1662826openalex-snapshot
Object-Based Computing and the Ada Programming Language
inferred← citeshttps://doi.org/10.1109/mc.1986.1663148openalex-snapshot
Adaptable Software for Supercomputers
inferred← citeshttps://doi.org/10.1109/mc.1986.1663175openalex-snapshot
Introducing Replicated VLSI to Supercomputing: the FPS-164/MAX Scientific Computer
inferred← citeshttps://doi.org/10.1109/mm.1981.290850openalex-snapshot
A VLSI Architecture for Software Structure: The Intel 8086
inferred← citeshttps://doi.org/10.1109/mm.1987.304916openalex-snapshot
Effective Implementation of a Parallel Language on a Multiprocessor
inferred← citeshttps://doi.org/10.1109/parbse.1990.77148openalex-snapshot
Design and analysis of multiple-bus arbiters with different priority schemes
inferred← citeshttps://doi.org/10.1109/proc.1976.10252openalex-snapshot
MININET: A microprocessor-controlled "Mininetwork"
inferred← citeshttps://doi.org/10.1109/proc.1977.10703openalex-snapshot
Design approaches and performance criteria for integrated voice/data switching
inferred← citeshttps://doi.org/10.1109/proc.1978.10872openalex-snapshot
Multi-microprocessors: An overview and working example
inferred← citeshttps://doi.org/10.1109/proc.1978.10873openalex-snapshot
Programming issues raised by a multiprocessor
inferred← citeshttps://doi.org/10.1109/proc.1978.11109openalex-snapshot
Pluribus—An operational fault-tolerant multiprocessor
inferred← citeshttps://doi.org/10.1109/proc.1978.11111openalex-snapshot
A case study of C.mmp, Cm*, and C.vmp: Part I—Experiences with fault tolerance in multiprocessor systems
inferred← citeshttps://doi.org/10.1109/t-c.1975.224335openalex-snapshot
Analysis of Memory Interference in Multiprocessors
inferred← citeshttps://doi.org/10.1109/tc.1976.1674594openalex-snapshot
Multiprocessing Systems
inferred← citeshttps://doi.org/10.1109/tc.1976.1674623openalex-snapshot
System Organizations for Speech Understanding: Implications of Network and Multiprocessor Computer Architectures for AI
inferred← citeshttps://doi.org/10.1109/tc.1977.1674734openalex-snapshot
A General Model for Memory Interference in Multiprocessors
inferred← citeshttps://doi.org/10.1109/tc.1977.1674758openalex-snapshot
The Distributed Pipeline
inferred← citeshttps://doi.org/10.1109/tc.1977.1674868openalex-snapshot
Some Performance Issues in Multiprocessor System Design
inferred← citeshttps://doi.org/10.1109/tc.1977.1674877openalex-snapshot
Memory and Bus Conflict in an Array Processor
inferred← citeshttps://doi.org/10.1109/tc.1977.1674908openalex-snapshot
Interconnection Networks from Three State Cells
inferred← citeshttps://doi.org/10.1109/tc.1977.5009291openalex-snapshot
On a Varistructured Array of Microprocessors
inferred← citeshttps://doi.org/10.1109/tc.1979.1675219openalex-snapshot
On the Analysis of Memory Conflicts and Bus Contentions in a Multiple-Microprocessor System
inferred← citeshttps://doi.org/10.1109/tc.1979.1675238openalex-snapshot
A Multicomputer System with Dynamic Architecture
inferred← citeshttps://doi.org/10.1109/tc.1979.1675379openalex-snapshot
Direct—A Multiprocessor Organization for Supporting Relational Database Management Systems
inferred← citeshttps://doi.org/10.1109/tc.1979.1675436openalex-snapshot
Interleaved Memory Bandwidth in a Model of a Multiprocessor Computer System
inferred← citeshttps://doi.org/10.1109/tc.1980.1675650openalex-snapshot
Multiple-Read Single-Write Memory and Its Applications
inferred← citeshttps://doi.org/10.1109/tc.1981.1675732openalex-snapshot
PASM: A Partitionable SIMD/MIMD System for Image Processing and Pattern Recognition
inferred← citeshttps://doi.org/10.1109/tc.1981.1675776openalex-snapshot
VLSI Performance Comparison of Banyan and Crossbar Communications Networks
inferred← citeshttps://doi.org/10.1109/tc.1982.1675920openalex-snapshot
The ETH-Multiprocessor Empress: A Dynamically Configurable MIMD System
inferred← citeshttps://doi.org/10.1109/tc.1982.1675928openalex-snapshot
Memory Interference in Synchronous Multiprocessor Systems
inferred← citeshttps://doi.org/10.1109/tc.1982.1675930openalex-snapshot
Modeling Unusual Behavior of Parallel Algorithms
inferred← citeshttps://doi.org/10.1109/tc.1982.1675942openalex-snapshot
Comparative Performance Analysis of Single Bus Multiprocessor Architectures
inferred← citeshttps://doi.org/10.1109/tc.1982.1675947openalex-snapshot
Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors
inferred← citeshttps://doi.org/10.1109/tc.1982.1675956openalex-snapshot
Design and Evaluation of a Synchronous Triangular Interconnection Scheme for Interprocessor Communications
inferred← citeshttps://doi.org/10.1109/tc.1982.1675977openalex-snapshot
Dense Trivalent Graphs for Processor Interconnection
inferred← citeshttps://doi.org/10.1109/tc.1982.1675980openalex-snapshot
Markov Models for Multiple Bus Multiprocessor Systems
inferred← citeshttps://doi.org/10.1109/tc.1983.1676120openalex-snapshot
Experiences with Performance Measurement and Modeling of a Processor Array
inferred← citeshttps://doi.org/10.1109/tc.1983.1676122openalex-snapshot
Shared Cache for Multiple-Stream Computer Systems
inferred← citeshttps://doi.org/10.1109/tc.1983.1676168openalex-snapshot
Design and Performance of Generalized Interconnection Networks
inferred← citeshttps://doi.org/10.1109/tc.1983.1676253openalex-snapshot
The Piecewise Data Flow Architecture: Architectural Concepts
inferred← citeshttps://doi.org/10.1109/tc.1983.1676295openalex-snapshot
Graph Theoretical Analysis and Design of Multistage Interconnection Networks
inferred← citeshttps://doi.org/10.1109/tc.1983.1676308openalex-snapshot
Reduction of Connections for Multibus Organization
inferred← citeshttps://doi.org/10.1109/tc.1984.1676437openalex-snapshot
Generalized Hypercube and Hyperbus Structures for a Computer Network
inferred← citeshttps://doi.org/10.1109/tc.1984.5009356openalex-snapshot
A Comparative Study of Distributed Resource Sharing on Multiprocessors
inferred← citeshttps://doi.org/10.1109/tc.1987.5009450openalex-snapshot
Exact Performance Estimates for Multiprocessor Memory and Bus Interference
inferred← citeshttps://doi.org/10.1109/tns.1976.4328213openalex-snapshot
Distributed Computer Intelligence for Data Acquisition and Control
inferred← citeshttps://doi.org/10.1109/tse.1983.236163openalex-snapshot
An Object-Oriented Command Language
inferred← citeshttps://doi.org/10.1109/tse.1985.231547openalex-snapshot
Allocating Independent Subtasks on Parallel Processors
inferred← citeshttps://doi.org/10.1109/tse.1986.6312881openalex-snapshot
Flexible software development for multiple computer systems
inferred← citeshttps://doi.org/10.1111/j.1477-9730.1985.tb00523.xopenalex-snapshot
BLOCK ADJUSTMENT WITH ARRAY AND VECTOR PROCESSORS
inferred← citeshttps://doi.org/10.1137/0905050openalex-snapshot
Techniques for Solving Block Tridiagonal Systems on Reconfigurable Array Computers
inferred← citeshttps://doi.org/10.1137/1020096openalex-snapshot
A Survey of Parallel Algorithms in Numerical Linear Algebra
inferred← citeshttps://doi.org/10.1145/1044744.1044745openalex-snapshot
Control functions for a multiprocessor architecture
inferred← citeshttps://doi.org/10.1145/106073.306843openalex-snapshot
High speed routing in a parallel processing environment
inferred← citeshttps://doi.org/10.1145/1067629.806529openalex-snapshot
A multi-microprocessor computer system architecture
inferred← citeshttps://doi.org/10.1145/1067651.801670openalex-snapshot
EMMA-an industrial experience on large multiprocessing architectures
inferred← citeshttps://doi.org/10.1145/1318441.1318443openalex-snapshot
A rider to "A Question of Semantics"
inferred← citeshttps://doi.org/10.1145/1480083.1480099openalex-snapshot
C.ai
inferred← citeshttps://doi.org/10.1145/1499402.1499471openalex-snapshot
Decomposition of data flow graphs on multiprocessors
inferred← citeshttps://doi.org/10.1145/1499402.1499515openalex-snapshot
Cm*
inferred← citeshttps://doi.org/10.1145/1499586.1499721openalex-snapshot
A new minicomputer/multiprocessor for the ARPA network
inferred← citeshttps://doi.org/10.1145/1499799.1499903openalex-snapshot
The CERF computer system
inferred← citeshttps://doi.org/10.1145/1500175.1500346openalex-snapshot
Interconnection networks
inferred← citeshttps://doi.org/10.1145/1500175.1500361openalex-snapshot
Security kernels
inferred← citeshttps://doi.org/10.1145/1500175.1500368openalex-snapshot
Research in data security
inferred← citeshttps://doi.org/10.1145/1500412.1500429openalex-snapshot
Modular crossbar switch for large-scale multiprocessor systems
inferred← citeshttps://doi.org/10.1145/1500518.1500545openalex-snapshot
An operating system kernel mechanism for the poly-processor system PPS-R
inferred← citeshttps://doi.org/10.1145/1500518.1500623openalex-snapshot
An overview of the Texas reconfigurable array computer
inferred← citeshttps://doi.org/10.1145/1500774.1500862openalex-snapshot
Distributed scheduling of resources on interconnection networks
inferred← citeshttps://doi.org/10.1145/165231.166113openalex-snapshot
KRS1
inferred← citeshttps://doi.org/10.1145/1941487.1941507openalex-snapshot
The future of microprocessors
inferred← citeshttps://doi.org/10.1145/23005.23016openalex-snapshot
Optimal reconfiguration strategy for a degradable multimodule computing system
inferred← citeshttps://doi.org/10.1145/255129.255137openalex-snapshot
An efficient caching support for critical sections in large-scale shared-memory multiprocessors
inferred← citeshttps://doi.org/10.1145/285930.285972openalex-snapshot
Banyan networks for partitioning multiprocessor systems
inferred← citeshttps://doi.org/10.1145/285930.285974openalex-snapshot
Computer structures
inferred← citeshttps://doi.org/10.1145/320613.320619openalex-snapshot
Concurrent manipulation of binary search trees
inferred← citeshttps://doi.org/10.1145/321941.321945openalex-snapshot
New Algorithms and Lower Bounds for the Parallel Evaluation of Certain Rational Expressions and Recurrences
inferred← citeshttps://doi.org/10.1145/325096.325107openalex-snapshot
Synchronization with multiprocessor caches
inferred← citeshttps://doi.org/10.1145/327070.327233openalex-snapshot
Dynamic, distributed resource configuration on SW-banyans
inferred← citeshttps://doi.org/10.1145/3304133.3304145openalex-snapshot
On the suitability of Ada multitasking for expressing parallel algorithms
inferred← citeshttps://doi.org/10.1145/355616.364017openalex-snapshot
HYDRA
inferred← citeshttps://doi.org/10.1145/356654.356658openalex-snapshot
Computer Interconnection Structures: Taxonomy, Characteristics, and Examples
inferred← citeshttps://doi.org/10.1145/357073.357075openalex-snapshot
A Language for Array and Vector Processors
inferred← citeshttps://doi.org/10.1145/357980.358015openalex-snapshot
Ethernet
inferred← citeshttps://doi.org/10.1145/359842.359858openalex-snapshot
Multiprocessor memory organization and memory interference
inferred← citeshttps://doi.org/10.1145/360238.360243openalex-snapshot
Interference in multiprocessor computer systems with interleaved memory
inferred← citeshttps://doi.org/10.1145/390016.808432openalex-snapshot
Reliable hardware-software architecture
inferred← citeshttps://doi.org/10.1145/633615.810652openalex-snapshot
Poly-Processor System analysis and design
inferred← citeshttps://doi.org/10.1145/633615.810653openalex-snapshot
A few examples of how to use a symmetrical multi-micro-processor
inferred← citeshttps://doi.org/10.1145/633615.810668openalex-snapshot
Reduction of memory interference in multiprocessor systems
inferred← citeshttps://doi.org/10.1145/633617.803541openalex-snapshot
Computer structures
inferred← citeshttps://doi.org/10.1145/633617.803544openalex-snapshot
A course in computer structures
inferred← citeshttps://doi.org/10.1145/633617.803548openalex-snapshot
A multimicroprocessor approach to numerical analysis
inferred← citeshttps://doi.org/10.1145/633642.803965openalex-snapshot
Markov chain models for analyzing memory interference in multiprocessor computer systems
inferred← citeshttps://doi.org/10.1145/633642.803988openalex-snapshot
Computer Modules
inferred← citeshttps://doi.org/10.1145/641559.641563openalex-snapshot
The effect of VLSI on computer architecture
inferred← citeshttps://doi.org/10.1145/641675.642119openalex-snapshot
A distributed function computer for real-time control
inferred← citeshttps://doi.org/10.1145/800046.801667openalex-snapshot
A comparative study of distributed resource sharing on multiprocessors
inferred← citeshttps://doi.org/10.1145/800046.801670openalex-snapshot
EMMA-an industrial experience on large multiprocessing architectures
inferred← citeshttps://doi.org/10.1145/800053.801919openalex-snapshot
The MuNet
inferred← citeshttps://doi.org/10.1145/800090.802891openalex-snapshot
Overview of the ARCADE system
inferred← citeshttps://doi.org/10.1145/800090.802908openalex-snapshot
Design issues in the development of a modular multiprocessor communications network
inferred← citeshttps://doi.org/10.1145/800090.802909openalex-snapshot
Experimental Polyprocessor System (EPOS)---architecture
inferred← citeshttps://doi.org/10.1145/800094.803029openalex-snapshot
A language implementation design for a multiprocessor computer system
inferred← citeshttps://doi.org/10.1145/800094.803041openalex-snapshot
X-Tree
inferred← citeshttps://doi.org/10.1145/800094.803045openalex-snapshot
Data structure architectures - a major operational principle
inferred← citeshttps://doi.org/10.1145/800094.803046openalex-snapshot
DIRECT - a multiprocessor organization for supporting relational data base management systems
inferred← citeshttps://doi.org/10.1145/800094.803051openalex-snapshot
Interconnection unit for Poly-Processor System
inferred← citeshttps://doi.org/10.1145/800118.803859openalex-snapshot
Modularity and multi-microprocessor structures
inferred← citeshttps://doi.org/10.1145/800118.803860openalex-snapshot
Some observations on modular design technology and the use of microprogramming
inferred← citeshttps://doi.org/10.1145/800119.803911openalex-snapshot
New algorithms and lower bounds for the parallel evaluation of certain rational expressions
inferred← citeshttps://doi.org/10.1145/800174.809801openalex-snapshot
An introduction to network computers
inferred← citeshttps://doi.org/10.1145/800176.810010openalex-snapshot
Multiprocessor hardware
inferred← citeshttps://doi.org/10.1145/800181.810300openalex-snapshot
The influence of microprocessors on computer architecture
inferred← citeshttps://doi.org/10.1145/800183.810451openalex-snapshot
Hardware systems in the core curriculum of a computer science ph.d. program
inferred← citeshttps://doi.org/10.1145/859427.859428openalex-snapshot
Computer communication techniques
inferred← citeshttps://doi.org/10.1146/annurev.cs.02.060187.002345openalex-snapshot
Techniques and Architectures for Fault-Tolerant Computing
inferred← citeshttps://doi.org/10.1184/r1/6587243openalex-snapshot
A collection of papers on Cm* : a multi-microprocessor computer system
inferred← citeshttps://doi.org/10.1184/r1/6602732openalex-snapshot
A survey of techniques for analyzing memory interference in multiprocessor computer systems
inferred← citeshttps://doi.org/10.1184/r1/6606035openalex-snapshot
Hardware core syllabus
inferred← citeshttps://doi.org/10.1184/r1/6608666openalex-snapshot
Programming in Ada : examples
inferred← citeshttps://doi.org/10.1184/r1/6608714openalex-snapshot
Proposal for continuation of research in information processing
inferred← citeshttps://doi.org/10.1184/r1/6608963openalex-snapshot
Reliability in multiprocessor systems : a case study of C.mmp, Cm* and C.vmp.
inferred← citeshttps://doi.org/10.1184/r1/6610388.v1openalex-snapshot
The C.mmp multiprocessor
inferred← citeshttps://doi.org/10.1201/9781420034349.ch15openalex-snapshot
Island (migration) models
inferred← citeshttps://doi.org/10.1201/9781420050387.ptcopenalex-snapshot
Evolutionary Computation Models
inferred← citeshttps://doi.org/10.1201/b16524-2openalex-snapshot
Distributed and Parallel Computing
inferred← citeshttps://doi.org/10.1201/b16524-4openalex-snapshot
Distributed and Parallel Computing
showing the first 200 of 218 · page through all 218
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.