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Scalable Analysis for Multi-Scale Dataflow Models

https://doi.org/10.1145/3233183
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-319-01246-9openalex-snapshot
Scheduling Real-Time Streaming Applications onto an Embedded Multiprocessor
inferredcites →https://doi.org/10.1007/bfb0055777openalex-snapshot
Computing ε-free NFA from regular expressions in O(n log2(N)) time
inferredcites →https://doi.org/10.1007/s11265-016-1193-7openalex-snapshot
Performance Analysis of Weakly-Consistent Scenario-Aware Dataflow Graphs
inferredcites →https://doi.org/10.1016/0012-365x(78)90011-0openalex-snapshot
A characterization of the minimum cycle mean in a digraph
inferredcites →https://doi.org/10.1016/0304-3975(93)90287-4openalex-snapshot
Regular expressions into finite automata
inferredcites →https://doi.org/10.1016/j.sysarc.2015.04.001openalex-snapshot
Dataflow formalisation of real-time streaming applications on a Composable and Predictable Multi-Processor SOC
inferredcites →https://doi.org/10.1023/a:1008052406396openalex-snapshot
Synthesis of Embedded Software from Synchronous Dataflow Specifications
inferredcites →https://doi.org/10.1051/ita:2000116openalex-snapshot
Computingϵ-Free NFA from Regular Expressions inO(nlog2(n)) Time
inferredcites →https://doi.org/10.1057/jors.1991.155openalex-snapshot
Introduction to Algorithms
inferredcites →https://doi.org/10.1109/78.485935openalex-snapshot
Cycle-static dataflow
inferredcites →https://doi.org/10.1109/9.478227openalex-snapshot
Performance evaluation of (max,+) automata
inferredcites →https://doi.org/10.1109/acsd.2006.23openalex-snapshot
SDF^3: SDF For Free
inferredcites →https://doi.org/10.1109/acsd.2006.33openalex-snapshot
Throughput Analysis of Synchronous Data Flow Graphs
inferredcites →https://doi.org/10.1109/acssc.2014.7094470openalex-snapshot
Performance analysis of weakly-consistent scenario-aware dataflow graphs
inferredcites →https://doi.org/10.1109/asap.1993.397152openalex-snapshot
Optimum vectorization of scalable synchronous dataflow graphs
inferredcites →https://doi.org/10.1109/asap.1995openalex-snapshot
Proceedings The International Conference on Application Specific Array Processors
inferredcites →https://doi.org/10.1109/memcod.2006.1695924openalex-snapshot
A scenario-aware data flow model for combined long-run average and worst-case performance analysis
inferredcites →https://doi.org/10.1109/proc.1987.13876openalex-snapshot
Synchronous data flow
inferredcites →https://doi.org/10.1109/rtss.2008.49openalex-snapshot
Efficient SAT-Based Mapping and Scheduling of Homogeneous Synchronous Dataflow Graphs for Throughput Optimization
inferredcites →https://doi.org/10.1109/samos.2011.6045491openalex-snapshot
Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications
inferredcites →https://doi.org/10.1109/samos18252.2011openalex-snapshot
2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation
inferredcites →https://doi.org/10.1109/sies.2016.7509444openalex-snapshot
Tight temporal bounds for dataflow applications mapped onto shared resources
inferredcites →https://doi.org/10.1109/tc.2008.58openalex-snapshot
Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs
inferredcites →https://doi.org/10.1145/1146909.1147138openalex-snapshot
Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs
inferredcites →https://doi.org/10.1145/1878961.1878985openalex-snapshot
Worst-case performance analysis of synchronous dataflow scenarios
inferredcites →https://doi.org/10.1145/1880050.1880052openalex-snapshot
Synchronous dataflow scenarios
inferredcites →https://doi.org/10.1145/2593069.2593223openalex-snapshot
Symbolic Analysis of Dataflow Applications Mapped onto Shared Heterogeneous Resources
inferredcites →https://doi.org/10.1145/2609248.2609249openalex-snapshot
Single-rate approximations of cyclo-static synchronous dataflow graphs
inferredcites →https://doi.org/10.1145/951710.951721openalex-snapshot
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip
inferredcites →https://doi.org/10.5555/1874620.1874652openalex-snapshot
Model-based synthesis and optimization of static multi-rate image processing algorithms
inferredcites →https://doi.org/10.6100/ir630223openalex-snapshot
Predictable mapping of streaming applications on multiprocessors

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-030-20343-6_8openalex-snapshot
Scenarios in Dataflow Modeling and Analysis
inferred← citeshttps://doi.org/10.1016/j.micpro.2020.103037openalex-snapshot
A scenario- and platform-aware design flow for image-based control systems
inferred← citeshttps://doi.org/10.1109/access.2021.3103051openalex-snapshot
Optimising Multiprocessor Image-Based Control Through Pipelining and Parallelism
inferred← citeshttps://doi.org/10.1109/cdc40024.2019.9030035openalex-snapshot
Designing image-based control systems considering workload variations
inferred← citeshttps://doi.org/10.1109/dsd.2018.00034openalex-snapshot
Compositional Dataflow Modelling for Cyclo-Static Applications
inferred← citeshttps://doi.org/10.1109/ewdts.2019.8884422openalex-snapshot
Implementation Variants of the Global Distributed Associative Computing Environment for the Parallel Dataflow Computing System “Buran”
inferred← citeshttps://doi.org/10.1109/ewdts52692.2021.9581026openalex-snapshot
Recovery of Parallel Dataflow Computing System From Faults and Failures
inferred← citeshttps://doi.org/10.1109/fpl68686.2025.00062openalex-snapshot
Analytical Buffer Sizing for Neural Network Inference Applications on FPGAs
inferred← citeshttps://doi.org/10.1109/icfpt67023.2025.00032openalex-snapshot
Heuristic & Expert-Guided Buffer Sizing for Neural Network Inference Applications on FPGAs
inferred← citeshttps://doi.org/10.1145/3626103openalex-snapshot
Automated Buffer Sizing of Dataflow Applications in a High-level Synthesis Workflow
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