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Bounded model checking of signal temporal logic properties using syntactic separation

https://doi.org/10.1145/3290364
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

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Computer Aided Verification
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Automatic Reachability Analysis for Nonlinear Hybrid Models with C2E2
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STL Model Checking of Continuous and Hybrid Systems
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Quantitative Monitoring of STL with Edit Distance
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Simulation-Equivalent Reachability of Large Linear Systems with Inputs
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AMT 2.0: Qualitative and Quantitative Trace Analysis with Extended Signal Temporal Logic
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Monitoring Temporal Properties of Continuous Signals
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An Improved On-the-Fly Tableau Construction for a Real-Time Temporal Logic
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Constraint-Based Approach for Analysis of Hybrid Systems
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AMT: A Property-Based Monitoring Tool for Analog Systems
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Some Recent Results in Metric Temporal Logic
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Breach, A Toolbox for Verification and Parameter Synthesis of Hybrid Systems
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dReal: An SMT Solver for Nonlinear Theories over the Reals
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Efficient Robust Monitoring for STL
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The Theory of Hybrid Automata
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Efficient monitoring of safety properties
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An interval-based SAT modulo ODE solver for model checking nonlinear hybrid systems
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Improving the SAT modulo ODE approach to hybrid systems analysis by combining different enclosure methods
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HySAT: An efficient proof engine for bounded model checking of hybrid systems
inferredcites →https://doi.org/10.1007/s10703-009-0066-0openalex-snapshot
Coverage-guided test generation for continuous and hybrid systems
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Computing differential invariants of hybrid systems as fixedpoints
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Robust online monitoring of signal temporal logic
inferredcites →https://doi.org/10.1007/s10703-018-0319-xopenalex-snapshot
Quantitative monitoring of STL with edit distance
inferredcites →https://doi.org/10.1007/s10817-008-9103-8openalex-snapshot
Differential Dynamic Logic for Hybrid Systems
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Protocol Specification
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An SMT-based approach to satisfiability checking of MITL
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Bounded Model Checking
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Lecture Notes in Computer Science 1205
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SMT-Based Bounded Model Checking for Embedded ANSI-C Software
inferredcites →https://doi.org/10.1109/fmcad.2013.6679398openalex-snapshot
Satisfiability modulo ODEs
inferredcites →https://doi.org/10.1109/fmcad33676.2014openalex-snapshot
2014 Formal Methods in Computer-Aided Design (FMCAD)
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Expressive Completeness for Metric Temporal Logic
inferredcites →https://doi.org/10.1109/memcod.2015.7340472openalex-snapshot
Metric interval temporal logic specification elicitation and debugging
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A Framework for Worst-Case and Stochastic Safety Verification Using Barrier Certificates
inferredcites →https://doi.org/10.1109/tse.2011.59openalex-snapshot
SMT-Based Bounded Model Checking for Embedded ANSI-C Software
inferredcites →https://doi.org/10.1145/112600.112613openalex-snapshot
The benefits of relaxing punctuality
inferredcites →https://doi.org/10.1145/174644.174651openalex-snapshot
A really temporal logic
inferredcites →https://doi.org/10.1145/2461328.2461358openalex-snapshot
Reachability analysis of nonlinear systems using conservative polynomialization and non-convex sets
inferredcites →https://doi.org/10.1145/2465787.2465797openalex-snapshot
Probabilistic Temporal Logic Falsification of Cyber-Physical Systems
inferredcites →https://doi.org/10.1145/2562059.2562140openalex-snapshot
Powertrain control verification benchmark
inferredcites →https://doi.org/10.1145/2728606.2728628openalex-snapshot
Reactive synthesis from signal temporal logic specifications
inferredcites →https://doi.org/10.1145/3178126.3178140openalex-snapshot
Parameter Invariant Monitoring for Signal Temporal Logic
inferredcites →https://doi.org/10.1609/aaai.v26i1.8442openalex-snapshot
SMT-Based Verification of Hybrid Systems
inferredcites →https://doi.org/10.1613/jair.3643openalex-snapshot
Plan-based Policies for Efficient Multiple Battery Load Management
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Modular SMT-based analysis of nonlinear hybrid systems
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Coverage-guided test generation for continuous and hybrid systems
inferredcites →https://doi.org/10.5555/2555754.2555780openalex-snapshot
Verification of annotated models from executions
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Efficient monitoring of safety properties

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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Modeling and reliability verification of industrial control network protocol based on time state transition matrix
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Property-Directed Verified Monitoring of Signal Temporal Logic
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Composition of Languages, Models, and Analyses
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Uncertainty-Aware Signal Temporal Logic Inference
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STLmc: Robust STL Model Checking of Hybrid Systems Using SMT
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