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Automata Processing in Reconfigurable Architectures

https://doi.org/10.1145/3314576
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1016/s0304-3975(97)00296-xopenalex-snapshot
Characterization of Glushkov automata
inferredcites →https://doi.org/10.1109/bigdata.2016.7840617openalex-snapshot
Entity resolution acceleration using the automata processor
inferredcites →https://doi.org/10.1109/bigdata.2017.8257936openalex-snapshot
Robotomata: A framework for approximate pattern matching of big data on an automata processor
inferredcites →https://doi.org/10.1109/fccm.2001.22openalex-snapshot
Fast Regular Expression Matching Using FPGAs
inferredcites →https://doi.org/10.1109/hpca.2018.00068openalex-snapshot
Searching for Potential gRNA Off-Target Sites for CRISPR/Cas9 Using Automata Processing Across Different Platforms
inferredcites →https://doi.org/10.1109/hpca.2018.00069openalex-snapshot
Characterizing and Mitigating Output Reporting Bottlenecks in Spatial Automata Processing Architectures
inferredcites →https://doi.org/10.1109/icosc.2015.7050812openalex-snapshot
Brill tagging on the Micron Automata Processor
inferredcites →https://doi.org/10.1109/iiswc.2016.7581271openalex-snapshot
ANMLzoo: a benchmark suite for exploring bottlenecks in automata processing engines and architectures
inferredcites →https://doi.org/10.1109/iiswc.2018.8573482openalex-snapshot
AutomataZoo: A Modern Automata Processing Benchmark Suite
inferredcites →https://doi.org/10.1109/ipdps.2015.101openalex-snapshot
Association Rule Mining with the Micron Automata Processor
inferredcites →https://doi.org/10.1109/lca.2017.2780105openalex-snapshot
MNCaRT: An Open-Source, Multi-Architecture Automata-Processing Research and Execution Ecosystem
inferredcites →https://doi.org/10.1109/micro.2002.1176233openalex-snapshot
Proceedings 35th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-35)
inferredcites →https://doi.org/10.1109/reconfig.2017.8279779openalex-snapshot
A Dynamically Reconfigurable Automata Processor Overlay
inferredcites →https://doi.org/10.1109/tc.2011.129openalex-snapshot
High-Performance and Compact Architecture for Regular Expression Matching on FPGA
inferredcites →https://doi.org/10.1109/tpds.2014.8openalex-snapshot
An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing
inferredcites →https://doi.org/10.1145/1364654.1364656openalex-snapshot
A hybrid finite automaton for practical deep packet inspection
inferredcites →https://doi.org/10.1145/1880153.1880157openalex-snapshot
iNFAnt
inferredcites →https://doi.org/10.1145/2213836.2213863openalex-snapshot
Skeleton automata for FPGAs
inferredcites →https://doi.org/10.1145/2560040openalex-snapshot
A study on parallelizing XML path filtering using accelerators
inferredcites →https://doi.org/10.1145/2872362.2872393openalex-snapshot
RAPID Programming of Pattern-Recognition Processors
inferredcites →https://doi.org/10.1145/2903150.2903172openalex-snapshot
Sequential pattern mining with the Micron automata processor
inferredcites →https://doi.org/10.1145/2968456.2976763openalex-snapshot
An overview of micron's automata processor
inferredcites →https://doi.org/10.1145/3079079.3079100openalex-snapshot
Demystifying automata processing
inferredcites →https://doi.org/10.1145/3219819.3219889openalex-snapshot
A Scalable Solution for Rule-Based Part-of-Speech Tagging on Novel Hardware Accelerators
inferredcites →https://doi.org/10.18130/v33970openalex-snapshot
Brill Tagging on the Micron Automata Processor
inferredcites →https://doi.org/10.23919/fpl.2017.8056759openalex-snapshot
REAPR: Reconfigurable engine for automata processing
inferredcites →https://doi.org/10.5555/3195638.3195692openalex-snapshot
HARE: hardware accelerator for regular expressions

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1039/d5cp00591dopenalex-snapshot
A review of synaptic devices based on organic ferroelectric materials
inferred← citeshttps://doi.org/10.1093/comjnl/bxac138openalex-snapshot
FPGA-CPU Architecture Accelerated Regular Expression Matching With Fast Preprocessing
inferred← citeshttps://doi.org/10.1109/2575-8411.2026.00092openalex-snapshot
RAGNAROS: Large-Scale Regex Processing Acceleration with Neural Networks for DPI
inferred← citeshttps://doi.org/10.1109/asp-dac58780.2024.10473854openalex-snapshot
Secco: Codesign for Resource Sharing in Regular-Expression Accelerators
inferred← citeshttps://doi.org/10.1109/dac18074.2021.9586095openalex-snapshot
New Regular Expressions on Old Accelerators
inferred← citeshttps://doi.org/10.1109/fccm48280.2020.00027openalex-snapshot
Grapefruit: An Open-Source, Full-Stack, and Customizable Automata Processing on FPGAs
inferred← citeshttps://doi.org/10.1109/icfpt59805.2023.00029openalex-snapshot
OD-REM: On-Demand Regular Expression Matching on FPGAs for Efficient Deep Packet Inspection
inferred← citeshttps://doi.org/10.1109/iwqos65803.2025.11143394openalex-snapshot
Talbot: Improving Throughput for Traffic Dynamics in Reconfigurable Datacenters
inferred← citeshttps://doi.org/10.1109/ton.2025.3650040openalex-snapshot
Blocking Is Not Stagnation: A Synchronous FPGA-CPU Architecture for Regular Expression Matching in Real-Time DPI
inferred← citeshttps://doi.org/10.1145/3450769openalex-snapshot
STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs
inferred← citeshttps://doi.org/10.1145/3466752.3480934openalex-snapshot
Sunder: Enabling Low-Overhead and Scalable Near-Data Pattern Matching Acceleration
inferred← citeshttps://doi.org/10.1145/3476982openalex-snapshot
CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching
inferred← citeshttps://doi.org/10.1145/3543622.3573190openalex-snapshot
hAP: A Spatial-von Neumann Heterogeneous Automata Processor with Optimized Resource and IO Overhead on FPGA
inferred← citeshttps://doi.org/10.1145/3676642.3736126openalex-snapshot
Hopps: Leveraging Sparsity to Accelerate Automata Processing
inferred← citeshttps://doi.org/10.1145/3695053.3731106openalex-snapshot
RAP: Reconfigurable Automata Processor
inferred← citeshttps://doi.org/10.34727/2020/isbn.978-3-85448-042-6_10openalex-snapshot
Runtime Verification on FPGAs with LTLf Specifications
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