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Simplifying Transactional Memory Support in C++

https://doi.org/10.1145/3328796
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/11864219_14openalex-snapshot
Transactional Locking II
inferredcites →https://doi.org/10.1007/978-3-540-92221-6_19openalex-snapshot
Ordering-Based Semantics for Software Transactional Memory
inferredcites →https://doi.org/10.1007/978-3-642-15291-7_2openalex-snapshot
Transactional Mutex Locks
inferredcites →https://doi.org/10.1007/978-3-642-15763-9_4openalex-snapshot
Transactions as the Foundation of a Memory Consistency Model
inferredcites →https://doi.org/10.1007/978-3-662-48653-5_15openalex-snapshot
Hybrid Transactional Memory Revisited
inferredcites →https://doi.org/10.1109/icpp.2008.55openalex-snapshot
Implementing and Exploiting Inevitability in Software Transactional Memory
inferredcites →https://doi.org/10.1109/icpp.2017.17openalex-snapshot
Practical Experience with Transactional Lock Elision
inferredcites →https://doi.org/10.1109/iiswc.2005.1525988openalex-snapshot
Proceedings of the 2005 IEEE International Symposium on Workload Characterization
inferredcites →https://doi.org/10.1109/iiswc.2008.4636089openalex-snapshot
STAMP: Stanford Transactional Applications for Multi-Processing
inferredcites →https://doi.org/10.1109/l-ca.2006.18openalex-snapshot
Subtleties of transactional memory atomicity semantics
inferredcites →https://doi.org/10.1109/pact.2009.20openalex-snapshot
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency
inferredcites →https://doi.org/10.1109/pact.2015.28openalex-snapshot
TSXProf: Profiling Hardware Transactions
inferredcites →https://doi.org/10.1145/1073814.1073861openalex-snapshot
Advanced contention management for dynamic software transactional memory
inferredcites →https://doi.org/10.1145/1122971.1123001openalex-snapshot
McRT-STM
inferredcites →https://doi.org/10.1145/1133255.1133985openalex-snapshot
Compiler and runtime support for efficient software transactional memory
inferredcites →https://doi.org/10.1145/1133981.1133983openalex-snapshot
The Atomos transactional programming language
inferredcites →https://doi.org/10.1145/1133981.1133984openalex-snapshot
Optimizing memory transactions
inferredcites →https://doi.org/10.1145/1133981.1133985openalex-snapshot
Compiler and runtime support for efficient software transactional memory
inferredcites →https://doi.org/10.1145/1250662.1250674openalex-snapshot
Performance pathologies in hardware transactional memory
inferredcites →https://doi.org/10.1145/1345206.1345241openalex-snapshot
Dynamic performance tuning of word-based software transactional memory
inferredcites →https://doi.org/10.1145/1378533.1378582openalex-snapshot
Kicking the tires of software transactional memory
inferredcites →https://doi.org/10.1145/1378533.1378584openalex-snapshot
Irrevocable transactions and their applications
inferredcites →https://doi.org/10.1145/1378533.1378588openalex-snapshot
Practical weak-atomicity semantics for java stm
inferredcites →https://doi.org/10.1145/1449764.1449780openalex-snapshot
Design and implementation of transactional constructs for C/C++
inferredcites →https://doi.org/10.1145/1583991.1584012openalex-snapshot
Towards transactional memory semantics for C++
inferredcites →https://doi.org/10.1145/165123.165164openalex-snapshot
Transactional memory
inferredcites →https://doi.org/10.1145/1693453.1693464openalex-snapshot
NOrec
inferredcites →https://doi.org/10.1145/1755913.1755918openalex-snapshot
Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack
inferredcites →https://doi.org/10.1145/1950365.1950373openalex-snapshot
Hybrid NOrec
inferredcites →https://doi.org/10.1145/1989493.1989500openalex-snapshot
A study of transactional memory vs. locks in practice
inferredcites →https://doi.org/10.1145/224964.224987openalex-snapshot
Software transactional memory
inferredcites →https://doi.org/10.1145/2503210.2503232openalex-snapshot
Performance evaluation of Intel® transactional synchronization extensions for high-performance computing
inferredcites →https://doi.org/10.1145/2541940.2541960openalex-snapshot
Transactionalizing legacy code
inferredcites →https://doi.org/10.1145/2628071.2628086openalex-snapshot
Invyswell
inferredcites →https://doi.org/10.1145/2693260openalex-snapshot
Efficient Correction of Anomalies in Snapshot Isolation Transactions
inferredcites →https://doi.org/10.1145/2694344.2694393openalex-snapshot
Reduced Hardware NOrec
inferredcites →https://doi.org/10.1145/2749469.2750403openalex-snapshot
Quantitative comparison of hardware transactional memory for Blue Gene/Q, zEnterprise EC12, Intel Core, and POWER8
inferredcites →https://doi.org/10.1145/2907294.2907303openalex-snapshot
NVL-C
inferredcites →https://doi.org/10.1145/2983990.2984029openalex-snapshot
Hybrid STM/HTM for nested transactions on OpenJDK
inferredcites →https://doi.org/10.1145/3168816openalex-snapshot
Automating efficient variable-grained resiliency for low-power IoT systems
inferredcites →https://doi.org/10.1145/605397.605399openalex-snapshot
Transactional lock-free execution of lock-based programs
inferredcites →https://doi.org/10.1145/605397.605400openalex-snapshot
Speculative synchronization
inferredcites →https://doi.org/10.5555/563998.564036openalex-snapshot
Speculative lock elision: enabling highly concurrent multithreaded execution

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/s42514-020-00049-2openalex-snapshot
A survey on optimizations towards best-effort hardware transactional memory
inferred← citeshttps://doi.org/10.1109/ipdps47924.2020.00044openalex-snapshot
Understanding and Improving Persistent Transactions on Optane™ DC Memory
inferred← citeshttps://doi.org/10.1109/ipdps47924.2020.00107openalex-snapshot
Improving Transactional Code Generation via Variable Annotation and Barrier Elision
inferred← citeshttps://doi.org/10.1109/pact.2019.00025openalex-snapshot
Optimizing Persistent Memory Transactions
inferred← citeshttps://doi.org/10.1109/pact58117.2023.00031openalex-snapshot
Separating Mechanism from Policy in STM
inferred← citeshttps://doi.org/10.1145/3382734.3405746openalex-snapshot
Brief Announcement: On Implementing Software Transactional Memory in the C++ Memory Model
inferred← citeshttps://doi.org/10.1145/3409964.3461826openalex-snapshot
Semantic Conflict Detection for Transactional Data Structure Libraries
inferred← citeshttps://doi.org/10.1145/3436730openalex-snapshot
SPX64
inferred← citeshttps://doi.org/10.1145/3475061.3475089openalex-snapshot
An extension for Transactional Memory in OpenMP
inferred← citeshttps://doi.org/10.1145/3533318openalex-snapshot
Using Barrier Elision to Improve Transactional Code Generation
inferred← citeshttps://doi.org/10.1145/3563352openalex-snapshot
Implementing and verifying release-acquire transactional memory in C11
inferred← citeshttps://doi.org/10.47749/t/unicamp.2020.1149098openalex-snapshot
Improving hardware/software transactional memory codesign
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