On the public citation graph
System-level Logical Execution Time
0 signed · 62 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-540-70930-5_9openalex-snapshot
Modeling with the Timing Definition Language (TDL)
inferredcites →https://doi.org/10.1007/978-3-642-24349-3_5openalex-snapshot
The Logical Execution Time Paradigm
inferredcites →https://doi.org/10.1007/s10626-011-0107-xopenalex-snapshot
Multi-task Implementation of Multi-periodic Synchronous Programs
inferredcites →https://doi.org/10.1016/b978-155860702-6/50013-2openalex-snapshot
The Synchronous Approach to Reactive and Real-Time Systems Manuscript received September 15, 1990; revised March 9, 1991. IEEE Log Number 9102298
inferredcites →https://doi.org/10.1016/j.sysarc.2017.09.004openalex-snapshot
End-to-end timing analysis of cause-effect chains in automotive embedded systems
inferredcites →https://doi.org/10.1016/s1367-5788(03)00002-6openalex-snapshot
Time-triggered real-time computing
inferredcites →https://doi.org/10.1109/iecon.2018.8591550openalex-snapshot
System Level LET: Mastering Cause-Effect Chains in Distributed Systems
inferredcites →https://doi.org/10.1109/isorc.2015.36openalex-snapshot
Applying Real-Time Programming to Legacy Embedded Control Software
inferredcites →https://doi.org/10.1109/jproc.2002.805825openalex-snapshot
Giotto: a time-triggered language for embedded programming
inferredcites →https://doi.org/10.1109/jproc.2002.805826openalex-snapshot
The synchronous languages 12 years later
inferredcites →https://doi.org/10.1109/jproc.2009.2039550openalex-snapshot
Moving From Federated to Integrated Architectures in Automotive: The Role of Standards, Methods and Tools
inferredcites →https://doi.org/10.1109/rtas.2016.7461355openalex-snapshot
Poster Abstract: Towards Parallelizing Legacy Embedded Control Software Using the LET Programming Paradigm
inferredcites →https://doi.org/10.1109/rtas.2018.00032openalex-snapshot
Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm
inferredcites →https://doi.org/10.1109/rtss.2014.28openalex-snapshot
Formal Analysis of Timing Effects on Closed-Loop Properties of Control Software
inferredcites →https://doi.org/10.1109/seas.2007.8openalex-snapshot
Model-Driven Development of FlexRay-Based Systems with the Timing Definition Language (TDL)
inferredcites →https://doi.org/10.1109/sies.2009.5196213openalex-snapshot
Programmable temporal isolation through variable-bandwidth servers
inferredcites →https://doi.org/10.1109/tc.2008.81openalex-snapshot
Implementing Synchronous Models on Loosely Time Triggered Architectures
inferredcites →https://doi.org/10.1145/1065910.1065915openalex-snapshot
Transparent distribution of real-time components based on logical execution time
inferredcites →https://doi.org/10.1145/2560033openalex-snapshot
Building timing predictable embedded systems
inferredcites →https://doi.org/10.1145/2744769.2747947openalex-snapshot
Timing-aware control software design for automotive systems
inferredcites →https://doi.org/10.4230/dagrep.8.2.122openalex-snapshot
The Logical Execution Time Paradigm: New Perspectives for Multicore Systems (Dagstuhl Seminar 18092)
inferredcites →https://doi.org/10.5555/1870926.1870931openalex-snapshot
Loosely time-triggered architectures for cyber-physical systems
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-22337-2_8openalex-snapshot
Generalizing Logical Execution Time
inferred← citeshttps://doi.org/10.1007/978-3-032-41269-0_9openalex-snapshot
Compliance-by-Design with Lingua Franca: Toward Meeting EU AI Act Requirements
inferred← citeshttps://doi.org/10.1016/j.sysarc.2023.102911openalex-snapshot
Supporting end-to-end data propagation delay analysis for TSN-based distributed vehicular embedded systems
inferred← citeshttps://doi.org/10.1016/j.sysarc.2023.102987openalex-snapshot
Supporting logical execution time in multi-core POSIX systems
inferred← citeshttps://doi.org/10.1016/j.sysarc.2025.103390openalex-snapshot
AP-LET: Enabling deterministic Pub/Sub communication in AUTOSAR Adaptive
inferred← citeshttps://doi.org/10.1016/j.sysarc.2025.103589openalex-snapshot
Optimizing utilization in logical execution time system with preserved externally-observable timed I/O semantics
inferred← citeshttps://doi.org/10.1016/j.sysarc.2026.103893openalex-snapshot
Ensuring schedulability and end-to-end latency in DAG-based tasks for AUTOSAR
inferred← citeshttps://doi.org/10.1109/ds-rt52167.2021.9576147openalex-snapshot
Contention-Free Scheduling Algorithm Using LET Paradigm for Clustered Many-core Processor
inferred← citeshttps://doi.org/10.1109/ds-rt55542.2022.9932069openalex-snapshot
A Behavior Specification and Simulation Methodology for Embedded Real-Time Software
inferred← citeshttps://doi.org/10.1109/dsd60849.2023.00067openalex-snapshot
Automatic Deployment of Embedded Real-Time Software Systems to Hypervisor-Managed Platforms
inferred← citeshttps://doi.org/10.1109/emsoft55006.2022.00017openalex-snapshot
Industry-track: System-Level Logical Execution Time for Automotive Software Development
inferred← citeshttps://doi.org/10.1109/fdl63219.2024.10673834openalex-snapshot
Timing enclaves for performance in Lingua Franca
inferred← citeshttps://doi.org/10.1109/isorc65339.2025.00016openalex-snapshot
Decreasing Utilization of Systems With Multi-Rate Cause-Effect Chains While Reducing End-To-End Latencies
inferred← citeshttps://doi.org/10.1109/iv51971.2022.9827429openalex-snapshot
Optimization-based Resource Allocation for an Automotive Service-oriented Software Architecture
inferred← citeshttps://doi.org/10.1109/jproc.2020.3035874openalex-snapshot
A Platform Programming Paradigm for Heterogeneous Systems Integration
inferred← citeshttps://doi.org/10.1109/les.2025.3600618openalex-snapshot
Instruction-Level Support for Deterministic Dataflow in Real-Time Systems
inferred← citeshttps://doi.org/10.1109/rtas61025.2024.00019openalex-snapshot
Optimizing Logical Execution Time Model for Both Determinism and Low Latency
inferred← citeshttps://doi.org/10.1109/rtas65571.2025.00026openalex-snapshot
Optimal Task Phasing for End-To-End Latency in Harmonic and Semi-Harmonic Automotive Systems
inferred← citeshttps://doi.org/10.1109/rtas68450.2026.00014openalex-snapshot
Shape-Aware Analysis of End-to-End Latency Under LET
inferred← citeshttps://doi.org/10.1109/rtss59052.2023.00042openalex-snapshot
Optimizing End-to-End Latency of Sporadic Cause-Effect Chains Using Priority Inheritance
inferred← citeshttps://doi.org/10.1109/rtss62706.2024.00041openalex-snapshot
Priority Optimization for Autonomous Driving Systems to Meet End-to-End Latency Constraints
inferred← citeshttps://doi.org/10.1109/rtss66672.2025.00048openalex-snapshot
TSI: A Time-Semantic Instruction Set for Deterministic Data-Flow Execution in Real-Time Embedded Systems
inferred← citeshttps://doi.org/10.1109/sbcci62366.2024.10703998openalex-snapshot
Joint Computation and Communication Analysis of Hard Real-Time Applications in Manycores
inferred← citeshttps://doi.org/10.1109/tc.2022.3191739openalex-snapshot
Optimizing Inter-Core Communications Under the LET Paradigm using DMA Engines
inferred← citeshttps://doi.org/10.1109/tc.2022.3197082openalex-snapshot
Comparing Communication Paradigms in Cause-Effect Chains
inferred← citeshttps://doi.org/10.1109/tcad.2022.3199146openalex-snapshot
Characterizing the Effect of Deadline Misses on Time-Triggered Task Chains
inferred← citeshttps://doi.org/10.1109/vtc2021-fall52928.2021.9625343openalex-snapshot
LETT: An Execution Model for Distributed Real-Time Systems
inferred← citeshttps://doi.org/10.1145/3565974openalex-snapshot
SchedGuard++: Protecting against Schedule Leaks Using Linux Containers on Multi-Core Processors
inferred← citeshttps://doi.org/10.1145/3573388openalex-snapshot
Robust Cause-Effect Chains with Bounded Execution Time and System-Level Logical Execution Time
inferred← citeshttps://doi.org/10.1145/3615357openalex-snapshot
Deterministic Coordination across Multiple Timelines
inferred← citeshttps://doi.org/10.1145/3696355.3696363openalex-snapshot
Managing End-to-End Timing Jitters in ROS2 Computation Chains
inferred← citeshttps://doi.org/10.1145/3762653openalex-snapshot
Quasi-Static Scheduling for Deterministic Timed Concurrent Models on Multi-Core Hardware
inferred← citeshttps://doi.org/10.2197/ipsjjip.30.646openalex-snapshot
LET Paradigm Scheduling Algorithm Considering Parallel Processing on Clustered Many-core Processor
inferred← citeshttps://doi.org/10.23919/date51398.2021.9474257openalex-snapshot
Efficient Run-Time Environments for System-Level LET Programming
inferred← citeshttps://doi.org/10.23919/date54114.2022.9774534openalex-snapshot
XANDAR: Exploiting the X-by-Construction Paradigm in Model-based Development of Safety-critical Systems
inferred← citeshttps://doi.org/10.23919/date64628.2025.10992699openalex-snapshot
Modeling the SL-LET Paradigm in AUTOSAR Adaptive
inferred← citeshttps://doi.org/10.3390/a17070294openalex-snapshot
Logical Execution Time and Time-Division Multiple Access in Multicore Embedded Systems: A Case Study
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.