On the public citation graph
MNFTL
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-642-22027-2_50openalex-snapshot
C-Lash: A Cache System for Optimizing NAND Flash Memory Performance and Lifetime
inferredcites →https://doi.org/10.1109/aspdac.2015.7059028openalex-snapshot
Unified non-volatile memory and NAND flash memory architecture in smartphones
inferredcites →https://doi.org/10.1109/codesisss51650.2020.9244033openalex-snapshot
Proceedings of the 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
inferredcites →https://doi.org/10.1109/iccad.2015.7372608openalex-snapshot
On relaxing page program disturbance over 3D MLC flash memory
inferredcites →https://doi.org/10.1109/iccad45719.2019.8942108openalex-snapshot
Proceedings of the 2019 International Conference on Computer-Aided Design (ICCAD)
inferredcites →https://doi.org/10.1109/iccd.2017.115openalex-snapshot
CooECC: A Cooperative Error Correction Scheme to Reduce LDPC Decoding Latency in NAND Flash
inferredcites →https://doi.org/10.1109/tc.2017.2679180openalex-snapshot
A Block-Level Log-Block Management Scheme for MLC NAND Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tcad.2016.2618881openalex-snapshot
vFlash: Virtualized Flash for Optimizing the I/O Performance in Mobile Devices
inferredcites →https://doi.org/10.1109/tcad.2016.2619480openalex-snapshot
FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency
inferredcites →https://doi.org/10.1109/tcad.2017.2766156openalex-snapshot
DLV: Exploiting Device Level Latency Variations for Performance Improvement on Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tcad.2017.2782765openalex-snapshot
ApproxFTL: On the Performance and Lifetime Improvement of 3-D NAND Flash-Based SSDs
inferredcites →https://doi.org/10.1109/tcad.2019.2925366openalex-snapshot
UniBuffer: Optimizing Journaling Overhead With Unified DRAM and NVM Hybrid Buffer Cache
inferredcites →https://doi.org/10.1109/tvlsi.2013.2294462openalex-snapshot
A Unified Write Buffer Cache Management Scheme for Flash Memory
inferredcites →https://doi.org/10.1145/1176887.1176911openalex-snapshot
A superblock-based flash translation layer for NAND flash memory
inferredcites →https://doi.org/10.1145/1275986.1275990openalex-snapshot
A log buffer-based flash translation layer using fully-associative sector translation
inferredcites →https://doi.org/10.1145/1376804.1376806openalex-snapshot
A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications
inferredcites →https://doi.org/10.1145/1450135.1450141openalex-snapshot
Deterministic service guarantees for nand flash using partial block cleaning
inferredcites →https://doi.org/10.1145/1629911.1630130openalex-snapshot
A commitment-based management strategy for the performance and reliability enhancement of flash-memory storage systems
inferredcites →https://doi.org/10.1145/2501626.2512467openalex-snapshot
A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systems
inferredcites →https://doi.org/10.1145/2724942.2724949openalex-snapshot
Revisiting read-ahead efficiency for raw NAND flash storage in embedded Linux
inferredcites →https://doi.org/10.1145/2744769.2744790openalex-snapshot
Achieving SLC performance with MLC flash memory
inferredcites →https://doi.org/10.1145/2903139openalex-snapshot
A Methodology for Estimating Performance and Power Consumption of Embedded Flash File Systems
inferredcites →https://doi.org/10.1145/2968456.2968466openalex-snapshot
A disturbance-aware sub-block design to improve reliability of 3D MLC flash memory
inferredcites →https://doi.org/10.1145/3129257openalex-snapshot
An SLC-Like Programming Scheme for MLC Flash Memory
inferredcites →https://doi.org/10.1145/3218603.3218627openalex-snapshot
Enabling Intra-Plane Parallel Block Erase in NAND Flash to Alleviate the Impact of Garbage Collection
inferredcites →https://doi.org/10.23919/date.2018.8342206openalex-snapshot
ShadowGC: Cooperative garbage collection with multi-level buffer for performance improvement in NAND flash-based SSDs
inferredcites →https://doi.org/10.3390/computers3010036openalex-snapshot
A Scalable and Highly Configurable Cache-Aware Hybrid Flash Translation Layer
inferredcites →https://doi.org/10.3850/9783981537079_0537openalex-snapshot
Unified DRAM and NVM Hybrid Buffer Cache Architecture for Reducing Journaling Overhead
inferredcites →https://doi.org/10.7873/date.2013.181openalex-snapshot
Low Cost Power Failure Protection for MLC NAND Flash Storage Systems with PRAM/DRAM Hybrid Buffer
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s11227-022-04602-4openalex-snapshot
RTFTL: design and implementation of real-time FTL algorithm for flash memory
inferred← citeshttps://doi.org/10.1016/j.neucom.2022.05.030openalex-snapshot
Novel, parallel and differential synaptic architecture based on NAND flash memory for high-density and highly-reliable binary neural networks
inferred← citeshttps://doi.org/10.1109/iccd56317.2022.00094openalex-snapshot
SoftSSD: Software-defined SSD Development Platform for Rapid Flash Firmware Prototyping
inferred← citeshttps://doi.org/10.1109/tcad.2022.3210390openalex-snapshot
ADAR: Application-Specific Data Allocation and Reprogramming Optimization for 3-D TLC Flash Memory
inferred← citeshttps://doi.org/10.1109/tce.2023.3319638openalex-snapshot
ALCod: Adaptive LDPC Coding for 3-D NAND Flash Memory Using Inter-Layer RBER Variation
inferred← citeshttps://doi.org/10.1109/ted.2023.3296389openalex-snapshot
Design and Evaluation of a Near-Sensor Magneto-Electric FET-Based Event Detector
inferred← citeshttps://doi.org/10.1109/ted.2024.3366172openalex-snapshot
Enabling Normally-Off In Situ Computing With a Magneto-Electric FET-Based SRAM Design
inferred← citeshttps://doi.org/10.1145/3484222openalex-snapshot
MeF-RAM: A New Non-Volatile Cache Memory Based on Magneto-Electric FET
inferred← citeshttps://doi.org/10.1145/3649476.3660361openalex-snapshot
Hybrid Magneto-electric FET-CMOS Integrated Memory Design for Instant-on Computing
inferred← citeshttps://doi.org/10.1145/3796534openalex-snapshot
DyLDPC: A Dynamic LDPC Code with Variable Correction Capability to Improve Decoding Performance for 3D NAND Flash Memory
inferred← citeshttps://doi.org/10.1631/fitee.2200456openalex-snapshot
SoftSSD: enabling rapid flash firmware prototyping for solid-state drives
inferred← citeshttps://doi.org/10.38124/ijisrt/25aug324openalex-snapshot
Machine Learning-Based Detection of SQL Injection and Data Exfiltration Through Behavioral Profiling of Relational Query Patterns
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