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Does SoC Hardware Development Become Agile by Saying So: A Literature Review and Mapping Study

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-030-00623-5_22openalex-snapshot
Agile Usage in Embedded Software Development in Safety Critical Domain–A Systematic Review
inferredcites →https://doi.org/10.1007/978-3-642-12575-1_3openalex-snapshot
Agile Software Development Methods: A Comparative Review1
inferredcites →https://doi.org/10.1007/978-3-642-39179-8_22openalex-snapshot
Definitions of Agile Software Development and Agility
inferredcites →https://doi.org/10.1016/j.infsof.2008.01.006openalex-snapshot
Empirical studies of agile software development: A systematic review
inferredcites →https://doi.org/10.1016/j.jss.2016.05.001openalex-snapshot
Agile methods in embedded system development: Multiple-case study of three industrial cases
inferredcites →https://doi.org/10.1016/j.jss.2016.06.013openalex-snapshot
Challenges and success factors for large-scale agile transformations: A systematic literature review
inferredcites →https://doi.org/10.1057/ejis.2009.27openalex-snapshot
‘Lots done, more to do’: the current state of agile systems development research
inferredcites →https://doi.org/10.1109/2.59openalex-snapshot
A spiral model of software development and enhancement
inferredcites →https://doi.org/10.1109/43.898830openalex-snapshot
System-level design: orthogonalization of concerns and platform-based design
inferredcites →https://doi.org/10.1109/dsd51259.2020.00060openalex-snapshot
Kamel: IP-XACT compatible intermediate meta-model for IP generation
inferredcites →https://doi.org/10.1109/dsd57027.2022.00045openalex-snapshot
Ballast: Implementation of a Large MP-SoC on 22nm ASIC Technology
inferredcites →https://doi.org/10.1109/ecbs.2008.19openalex-snapshot
A Platform-Based Software Design Methodology for Embedded Control Systems: An Agile Toolkit
inferredcites →https://doi.org/10.1109/eit.2009.5189647openalex-snapshot
Agile hardware development with rapid hardware definition language
inferredcites →https://doi.org/10.1109/ice.2019.8792665openalex-snapshot
Potential of Technological Enablement for Agile Automotive Product Development
inferredcites →https://doi.org/10.1109/icgse.2017.15openalex-snapshot
Adopting SAFe to Scale Agile in a Globally Distributed Organization
inferredcites →https://doi.org/10.1109/icstw.2015.7107425openalex-snapshot
Test driven development for device drivers and rapid hardware prototyping
inferredcites →https://doi.org/10.1109/jssc.2019.2924090openalex-snapshot
A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance
inferredcites →https://doi.org/10.1109/jssc.2021.3118046openalex-snapshot
An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET
inferredcites →https://doi.org/10.1109/mc.1983.1654264openalex-snapshot
Guest Editors' Introduction: New VLSI Tools
inferredcites →https://doi.org/10.1109/mc.2011.300openalex-snapshot
Rethinking Hardware-Software Codesign for Exascale Systems
inferredcites →https://doi.org/10.1109/miel52794.2021.9569153openalex-snapshot
A Chisel Generator of Parameterizable and Runtime Reconfigurable Linear Insertion Streaming Sorters
inferredcites →https://doi.org/10.1109/mm.2016.11openalex-snapshot
An Agile Approach to Building RISC-V Microprocessors
inferredcites →https://doi.org/10.1109/mm.2020.2995809openalex-snapshot
CHIPKIT: An Agile, Reusable Open-Source Framework for Rapid Test Chip Development
inferredcites →https://doi.org/10.1109/mm.2020.2996145openalex-snapshot
BlackParrot: An Agile Open-Source RISC-V Multicore for Accelerator SoCs
inferredcites →https://doi.org/10.1109/mm.2020.2996508openalex-snapshot
LiveHD: A Productive Live Hardware Development Flow
inferredcites →https://doi.org/10.1109/mm.2020.2996616openalex-snapshot
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs
inferredcites →https://doi.org/10.1109/mm.2020.2997638openalex-snapshot
PyMTL3: A Python Framework for Open-Source Hardware Modeling, Generation, Simulation, and Verification
inferredcites →https://doi.org/10.1109/mm.2020.2997704openalex-snapshot
Agile Hardware Development and Instrumentation With PyRTL
inferredcites →https://doi.org/10.1109/mm.2020.2997706openalex-snapshot
OpenPiton at 5: A Nexus for Open and Agile Hardware Design
inferredcites →https://doi.org/10.1109/norcas53631.2021.9599869openalex-snapshot
ChiselVerify: An Open-Source Hardware Verification Library for Chisel and Scala
inferredcites →https://doi.org/10.1109/spl.2019.8714377openalex-snapshot
Flexible Software to Hardware Migration Methodology for FPGA Design and Verification
inferredcites →https://doi.org/10.1145/2593812.2593819openalex-snapshot
Scrum for cyber-physical systems: a process proposal
inferredcites →https://doi.org/10.1145/3400302.3415751openalex-snapshot
A simulator and compiler framework for agile hardware-software co-design evaluation and exploration
inferredcites →https://doi.org/10.1145/3400302.3415753openalex-snapshot
Agile SoC development with open ESP
inferredcites →https://doi.org/10.1145/3400302.3415781openalex-snapshot
SODA
inferredcites →https://doi.org/10.1145/3466752.3480051openalex-snapshot
A Hardware Accelerator for Protocol Buffers
inferredcites →https://doi.org/10.1186/1687-3963-2013-15openalex-snapshot
Agile methods for embedded systems development - a literature review and a mapping study
inferredcites →https://doi.org/10.21105/joss.00151openalex-snapshot
Kactus2: A graphical EDA tool built on the IP-XACT standard

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-032-32032-2_2openalex-snapshot
Quality Propagation, Escalation Patterns, and Feedback Metrics for New Product Introduction
inferred← citeshttps://doi.org/10.1007/978-981-97-0801-7_16openalex-snapshot
A Pipelined AES and SM4 Hardware Implementation for Multi-tasking Virtualized Environments
inferred← citeshttps://doi.org/10.1109/asp-dac58780.2024.10473953openalex-snapshot
Towards a Highly Interactive Design-Debug-Verification Cycle
inferred← citeshttps://doi.org/10.1109/meco62516.2024.10577831openalex-snapshot
Measuring the SoC development process quality with Fault-slip-Through methodology
inferred← citeshttps://doi.org/10.1109/norcas58970.2023.10305453openalex-snapshot
Memory Mapped I/O Register Test Case Generator for Large Systems-on-Chip
inferred← citeshttps://doi.org/10.1109/tsm.2024.3434331openalex-snapshot
Reducing Datacenter Compute Carbon Footprint by Harnessing the Power of Specialization: Principles, Metrics, Challenges and Opportunities
inferred← citeshttps://doi.org/10.1140/epjs/s11734-025-01754-1openalex-snapshot
Agile methodologies for the development of radiation-hardened integrated circuits
inferred← citeshttps://doi.org/10.1145/3748173.3779203openalex-snapshot
Hyperscale FPGA Engineering Systems at Microsoft
inferred← citeshttps://doi.org/10.47576/2949-1916.2026.6.6.022openalex-snapshot
Адаптация ценностей и принципов Agile к разработке материальных продуктов на производственных предприятиях
inferred← citeshttps://doi.org/10.5753/jserd.2026.7887openalex-snapshot
Scrumban in Hybrid Environments: An Empirical Investigation of Organizational Use and Impact in Development Teams
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