On the public citation graph
A Survey of High-Performance Interconnection Networks in High-Performance Computer Systems
0 signed · 71 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-319-07518-1_35openalex-snapshot
Tofu Interconnect 2: System-on-Chip Integration of High-Performance Interconnect
inferredcites →https://doi.org/10.1007/s11390-015-1520-7openalex-snapshot
High Performance Interconnect Network for Tianhe System
inferredcites →https://doi.org/10.1007/s11432-016-5588-7openalex-snapshot
The Sunway TaihuLight supercomputer: system and applications
inferredcites →https://doi.org/10.1007/s11432-020-2861-0openalex-snapshot
Research trend of large-scale supercomputers and applications from the TOP500 and Gordon Bell Prize
inferredcites →https://doi.org/10.1007/s11432-020-3104-7openalex-snapshot
Sunway supercomputer architecture towards exascale computing: analysis and practice
inferredcites →https://doi.org/10.1007/s11704-014-3500-9openalex-snapshot
The TH Express high performance interconnect networks
inferredcites →https://doi.org/10.1007/s42514-019-00010-yopenalex-snapshot
Paving the way for China exascale computing
inferredcites →https://doi.org/10.1016/j.respol.2015.01.005openalex-snapshot
An organizational perspective to funding science: Collaborator novelty at DARPA
inferredcites →https://doi.org/10.1109/ccgrid.2015.79openalex-snapshot
Toward Implementing Robust Support for Portals 4 Networks in MPICH
inferredcites →https://doi.org/10.1109/emr.2020.2975186openalex-snapshot
DARPA: A Global Innovation Differentiator
inferredcites →https://doi.org/10.1109/hotchips.2013.7478310openalex-snapshot
Integrating rack level connectivity into a PCIe switch
inferredcites →https://doi.org/10.1109/hotchips.2015.7477455openalex-snapshot
Oracle's Sonoma processor: Advanced low-cost SPARC processor for enterprise workloads
inferredcites →https://doi.org/10.1109/hoti.2015.15openalex-snapshot
The BXI Interconnect Architecture
inferredcites →https://doi.org/10.1109/isca.2008.19openalex-snapshot
Technology-Driven, Highly-Scalable Dragonfly Topology
inferredcites →https://doi.org/10.1109/jlt.2014.2363947openalex-snapshot
Silicon Photonics for Exascale Systems
inferredcites →https://doi.org/10.1109/jlt.2015.2446463openalex-snapshot
Design and Fabrication of Low-Insertion-Loss and Low-Crosstalk Broadband $2\times 2$ Mach–Zehnder Silicon Photonic Switches
inferredcites →https://doi.org/10.1109/jproc.2009.2014298openalex-snapshot
Device Requirements for Optical Interconnects to Silicon Chips
inferredcites →https://doi.org/10.1109/jssc.1974.1050511openalex-snapshot
Design of ion-implanted MOSFET's with very small physical dimensions
inferredcites →https://doi.org/10.1109/mm.2006.65openalex-snapshot
SeaStar Interconnect: Balanced Bandwidth for Scalable Performance
inferredcites →https://doi.org/10.1109/mm.2016.58openalex-snapshot
Enabling Scalable High-Performance Systems with the Intel Omni-Path Architecture
inferredcites →https://doi.org/10.1109/sc.2012.39openalex-snapshot
Cray Cascade: A scalable HPC system based on a Dragonfly network
inferredcites →https://doi.org/10.1109/sc.companion.2012.264openalex-snapshot
Poster: Portals 4 Network Programming Interface
inferredcites →https://doi.org/10.1109/sc41405.2020.00039openalex-snapshot
An In-Depth Analysis of the Slingshot Interconnect
inferredcites →https://doi.org/10.1109/tc.2012.183openalex-snapshot
Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration
inferredcites →https://doi.org/10.1145/2676870.2676871openalex-snapshot
Early Evaluation of Scalable Fabric Interface for PGAS Programming Models
inferredcites →https://doi.org/10.1145/2983387openalex-snapshot
Interconnection Networks in Petascale Computer Systems
inferredcites →https://doi.org/10.1145/3282307openalex-snapshot
A new golden age for computer architecture
inferredcites →https://doi.org/10.1147/jrd.2020.2967330openalex-snapshot
The high-speed networks of the Summit and Sierra supercomputers
inferredcites →https://doi.org/10.1177/1094342018778123openalex-snapshot
Big data and extreme-scale computing
inferredcites →https://doi.org/10.1631/fitee.1800494openalex-snapshot
Moving from exascale to zettascale computing: challenges and techniques
inferredcites →https://doi.org/10.17815/jlsrf-5-171openalex-snapshot
JUWELS: Modular Tier-0/1 Supercomputer at the Jülich Supercomputing Centre
inferredcites →https://doi.org/10.26599/tst.2020.9010009openalex-snapshot
Brief introduction of TianHe exascale prototype system
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-54369-2_13openalex-snapshot
Distributed Computing and Programming
inferred← citeshttps://doi.org/10.1007/978-3-031-85697-6_17openalex-snapshot
Tracing of GPU-Aware MPI Applications: First Benchmarks for the Angara Interconnect
inferred← citeshttps://doi.org/10.1007/978-981-99-3672-4_2openalex-snapshot
Trajectory Inference Optimization Based on Improved DR Algorithm
inferred← citeshttps://doi.org/10.1007/s11227-024-06784-5openalex-snapshot
Parallel construction of edge-independent spanning trees in complete Josephus cubes
inferred← citeshttps://doi.org/10.1007/s11227-025-07174-1openalex-snapshot
Reliability of hierarchical cubic networks based on component fault pattern
inferred← citeshttps://doi.org/10.1007/s42514-025-00246-xopenalex-snapshot
Para-FDS: a scalable multilevel parallel scheme for fire dynamic simulator on multicore architectures
inferred← citeshttps://doi.org/10.1016/b978-0-443-45574-2.00018-6openalex-snapshot
Architectural overview of high-performance computing systems
inferred← citeshttps://doi.org/10.1016/b978-0-443-45574-2.00022-8openalex-snapshot
Fundamentals of high-performance computing
inferred← citeshttps://doi.org/10.1016/j.crmeth.2025.100988openalex-snapshot
Comparative prospects of imaging methods for whole-brain mammalian connectomics
inferred← citeshttps://doi.org/10.1016/j.mejo.2026.107361openalex-snapshot
A 72-Gb/s/pin PAM-3 transmitter with asymmetric reconfigurable feedforward equalizer and edge-shaping crosstalk cancellation
inferred← citeshttps://doi.org/10.1016/j.micpro.2025.105224openalex-snapshot
Hardware and software design of APEnetX: A custom high-speed interconnect for scientific computing
inferred← citeshttps://doi.org/10.1016/j.mssp.2026.110752openalex-snapshot
Nanoscale interconnects of gold, copper, and aluminium-based mono-silicide nanotubes for next generation integrated circuits
inferred← citeshttps://doi.org/10.1093/nsr/nwag282openalex-snapshot
On-chip large-scale all-optical interconnect for ultra-low-latency deep neural network inference
inferred← citeshttps://doi.org/10.1109/access.2025.3605303openalex-snapshot
Exploring the Feasibility of Novel 3D Polyhedrally-Tiled Computing Arrays
inferred← citeshttps://doi.org/10.1109/acp66871.2025.11350977openalex-snapshot
Novel Deterministic Ultra-Low Latency Multi-Services Slicing Technology for Data Center Network and Field Trial
inferred← citeshttps://doi.org/10.1109/bigdata62323.2024.10825804openalex-snapshot
MPI Allgather Utilizing CXL Shared Memory Pool in Multi-Node Computing Systems
inferred← citeshttps://doi.org/10.1109/dcc58796.2024.00052openalex-snapshot
Light-weight Steganography for HPC Lossy Compression
inferred← citeshttps://doi.org/10.1109/icctit64404.2024.10928544openalex-snapshot
Optimizing Training Performance via Omni-Block Sparsity Adaptation
inferred← citeshttps://doi.org/10.1109/iciiet65921.2025.11378995openalex-snapshot
Quantum-Cryptography Embedded Fault-Tolerant Algorithm for High-Performance Cloud Supercomputing Systems
inferred← citeshttps://doi.org/10.1109/mcas.2024.3349669openalex-snapshot
Wafer-Scale Computing: Advancements, Challenges, and Future Perspectives [Feature]
inferred← citeshttps://doi.org/10.1109/sc41406.2024.00037openalex-snapshot
An Evaluation of the Effect of Network Cost Optimization for Leadership Class Supercomputers
inferred← citeshttps://doi.org/10.1142/s0218126626500817openalex-snapshot
Enhancing Energy Efficiency in Networks-On-Chip Through Orca-Inspired Optimization
inferred← citeshttps://doi.org/10.1142/s0219265924500208openalex-snapshot
Improving the Reliability of Interconnection Networks Using Replicated 4-Disjoint GIN
inferred← citeshttps://doi.org/10.1145/3624062.3624255openalex-snapshot
Implementation-Oblivious Transparent Checkpoint-Restart for MPI
inferred← citeshttps://doi.org/10.1145/3813723.3813735openalex-snapshot
A Review of Research on Computing Power Network Topologies
inferred← citeshttps://doi.org/10.1177/10943420251347461openalex-snapshot
Technology trends in computing hardware and their impacts on high-performance scientific computing Part II: Memory systems, interconnects, and system integration
inferred← citeshttps://doi.org/10.1177/10943420251411961openalex-snapshot
Towards performance analysis of GPU-aware MPI over Angara interconnect
inferred← citeshttps://doi.org/10.1364/ofc.2023.th1d.3openalex-snapshot
How Data Center Networks Can Improve Through Co-packaged Optics
inferred← citeshttps://doi.org/10.15587/1729-4061.2024.316779openalex-snapshot
Development a set of mathematical models for anomaly detection in high-load complex computer systems
inferred← citeshttps://doi.org/10.3390/electronics14040677openalex-snapshot
State of the Art in Parallel and Distributed Systems: Emerging Trends and Challenges
inferred← citeshttps://doi.org/10.3390/electronics15010116openalex-snapshot
A High-Performance Computing Cluster Intelligent Scheduling Algorithm Based on Graph Neural Network and Actor–Critic
inferred← citeshttps://doi.org/10.3390/electronics15184074openalex-snapshot
Scaling and Validating a Distributed Training and Retraining Pipeline for Network Intrusion Detection
inferred← citeshttps://doi.org/10.3390/info16090783openalex-snapshot
A Hybrid Framework for the Sensitivity Analysis of Software-Defined Networking Performance Metrics Using Design of Experiments and Machine Learning Techniques
inferred← citeshttps://doi.org/10.3390/met13071169openalex-snapshot
A Review of Large-Scale Simulations of Microstructural Evolution during Alloy Solidification
inferred← citeshttps://doi.org/10.3390/sym15030761openalex-snapshot
Complexity Analysis of Benes Network and Its Derived Classes via Information Functional Based Entropies
inferred← citeshttps://doi.org/10.70675/688d1f31zda52z4c68z82d7z880325a9f3acopenalex-snapshot
Novel 3D 1T1R RRAM architecture for memory-centric hyperdimensional computing
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.