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An Asymmetrical 19-Level Inverter with a Reduced Number of Switches and Capacitors

https://doi.org/10.3390/electronics12020338

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

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New cascaded multilevel inverter topology with minimum number of switches

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Topology for cascaded multilevel inverter

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Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count

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A Review of Modulation and Control Techniques for Multilevel Inverters in Traction Applications

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Solution for Selective Harmonic Elimination in Asymmetric Multilevel Inverter Based on Stochastic Configuration Network and Levenberg-Marquardt Algorithm

inferredcites →https://doi.org/10.1109/compel.2019.8769615openalex-snapshot

Modeling of Capacitor Voltage Imbalance in Flying Capacitor Multilevel DC-DC Converters

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Unified Selective Harmonic Elimination for Cascaded H-Bridge Asymmetric Multilevel Inverter

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Modified Seven-Level Pack U-Cell Inverter for Photovoltaic Applications

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A Review of Multilevel Inverter Topologies in Electric Vehicles: Current Status and Future Trends

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Novel Cascaded Switched-Diode Multilevel Inverter for Renewable Energy Integration

inferredcites →https://doi.org/10.1109/tie.2011.2158768openalex-snapshot

A Switched-Capacitor Inverter Using Series/Parallel Conversion With Inductive Load

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Hybrid Multilevel Inverter Using Switched Capacitor Units

inferredcites →https://doi.org/10.1109/tie.2014.2314052openalex-snapshot

A Step-Up Switched-Capacitor Multilevel Inverter With Self-Voltage Balancing

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A New Cascaded Switched-Capacitor Multilevel Inverter Based on Improved Series–Parallel Conversion With Less Number of Components

inferredcites →https://doi.org/10.1109/tie.2018.2811365openalex-snapshot

Selective Harmonic Elimination Technique With Control of Capacitive DC-Link Voltages in an Asymmetric Cascaded H-Bridge Inverter for STATCOM Application

inferredcites →https://doi.org/10.1109/tie.2021.3066932openalex-snapshot

Neutral-Point-Clamped Five-Level Inverter With Self-Balanced Switched Capacitor

inferredcites →https://doi.org/10.1109/tpel.2012.2237415openalex-snapshot

Voltage Balancing control in 3-Level Neutral-Point Clamped Inverters Using Triangular Carrier PWM Modulation for FACTS Applications

inferredcites →https://doi.org/10.1109/tpel.2015.2492555openalex-snapshot

Generalized Structure for a Single Phase Switched-Capacitor Multilevel Inverter Using a New Multiple DC Link Producer With Reduced Number of Switches

inferredcites →https://doi.org/10.1109/tpel.2015.2498107openalex-snapshot

Analytical Determination of Conduction and Switching Power Losses in Flying-Capacitor-Based Active Neutral-Point-Clamped Multilevel Converter

inferredcites →https://doi.org/10.1109/tpel.2017.2664068openalex-snapshot

Hybrid Seven-Level Converter Based on T-Type Converter and H-Bridge Cascaded Under SPWM and SVM

inferredcites →https://doi.org/10.1109/tpel.2017.2669377openalex-snapshot

A Self-Balanced Step-Up Multilevel Inverter Based on Switched-Capacitor Structure

inferredcites →https://doi.org/10.1109/tpwrd.2012.2191802openalex-snapshot

Capacitor Voltage Balancing of Flying Capacitor Multilevel Converters by Space Vector PWM

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Three-Phase Single PV Array fed Scott-Ternary Multilevel Converter with Nearest Level Control

inferredcites →https://doi.org/10.22109/jemt.2020.199538.1193openalex-snapshot

New switched-capacitor multilevel converter with reduced elements

inferredcites →https://doi.org/10.23919/ipec.2018.8507699openalex-snapshot

A New Topology of Switched-Capacitor Multilevel Inverter for Single-Phase Grid-Connected with Eliminating Leakage Current

inferredcites →https://doi.org/10.2478/pead-2018-0011openalex-snapshot

Novel Converter for Voltage Balance in Series-Connected Capacitors and Batteries

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A Reduced Switch Asymmetric Multilevel Inverter Topology Using Unipolar Pulse Width Modulation Strategies for Photovoltaic Application

inferredcites →https://doi.org/10.6113/jpe.2018.18.4.1051openalex-snapshot

Step-up Switched Capacitor Multilevel Inverter with a Cascaded Structure in Asymmetric DC Source Configuration

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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Selective Harmonic Elimination: A Comparative Study on Three-Phase Cascade H-Bridge and Modified Nine-Level Mli

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Advanced hybrid control strategy for a 19-level asymmetrical multilevel inverter in grid-connected hybrid renewable energy systems

inferred← citeshttps://doi.org/10.1016/j.fraope.2026.100703openalex-snapshot

Design and analysis of an asymmetric inverter using low frequency control method

inferred← citeshttps://doi.org/10.1109/iccsc66714.2025.11135032openalex-snapshot

A New Nineteen-Level H-SPUC Inverter with Reduced Power Electronics Components

inferred← citeshttps://doi.org/10.1109/icsses62373.2024.10561308openalex-snapshot

Selective Harmonic Elimination in Multilevel inverter using Grasshopper Optimization algorithm

inferred← citeshttps://doi.org/10.1109/ictem60690.2024.10631938openalex-snapshot

Developed H-Bridge Based 19-Level Boost Inverter

inferred← citeshttps://doi.org/10.2478/pead-2023-0018openalex-snapshot

Neural Network-Based Optimisation of Sinusoidal PWM Controller for VSI-Driven BLDC Motor

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A novel controller for PV-fed water pumping optimization system driven by an 8/6 pole SRM with asymmetrical converter

inferred← citeshttps://doi.org/10.3390/electronics12041058openalex-snapshot

Investigation of Recent Metaheuristics Based Selective Harmonic Elimination Problem for Different Levels of Multilevel Inverters

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A Novel Multilevel Inverter Topology Generating a 19-Level Output Regulated by the PD-PWM Method

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