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Efficient Implementation of ARX-Based Block Ciphers on 8-Bit AVR Microcontrollers

https://doi.org/10.3390/math8101837
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/11894063_4openalex-snapshot
HIGHT: A New Block Cipher Suitable for Low-Resource Device
inferredcites →https://doi.org/10.1007/978-3-030-12942-2_21openalex-snapshot
Efficient Implementation of the SHA-512 Hash Function for 8-Bit AVR Microcontrollers
inferredcites →https://doi.org/10.1007/978-3-030-17982-3_20openalex-snapshot
Compact LEA and HIGHT Implementations on 8-Bit AVR and 16-Bit MSP Processors
inferredcites →https://doi.org/10.1007/978-3-030-40921-0_6openalex-snapshot
FACE–LIGHT: Fast AES–CTR Mode Encryption for Low-End Microcontrollers
inferredcites →https://doi.org/10.1007/978-3-030-65299-9_10openalex-snapshot
Compact Implementation of CHAM Block Cipher on Low-End Microcontrollers
inferredcites →https://doi.org/10.1007/978-3-030-65299-9_21openalex-snapshot
An Efficient Implementation of AES on 8-Bit AVR-Based Sensor Nodes
inferredcites →https://doi.org/10.1007/978-3-319-05149-9_1openalex-snapshot
LEA: A 128-Bit Block Cipher for Fast Encryption on Common Processors
inferredcites →https://doi.org/10.1007/978-3-319-16363-5_1openalex-snapshot
The Simon and Speck Block Ciphers on AVR 8-Bit Microcontrollers
inferredcites →https://doi.org/10.1007/978-3-319-31875-2_3openalex-snapshot
Compact Implementations of LEA Block Cipher for Low-End Microprocessors
inferredcites →https://doi.org/10.1007/978-3-319-78556-1_1openalex-snapshot
CHAM: A Family of Lightweight Block Ciphers for Resource-Constrained Devices
inferredcites →https://doi.org/10.1007/978-3-642-13858-4_5openalex-snapshot
Fast Software AES Encryption
inferredcites →https://doi.org/10.1007/978-3-642-31410-0_11openalex-snapshot
Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices
inferredcites →https://doi.org/10.1007/978-3-642-37288-9_11openalex-snapshot
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices
inferredcites →https://doi.org/10.1109/chilecon.2015.7404685openalex-snapshot
Implementation of ‘HIGHT’ encryption algorithm on microcontroller
inferredcites →https://doi.org/10.1145/2744769openalex-snapshot
Proceedings of the 52nd Annual Design Automation Conference
inferredcites →https://doi.org/10.1145/3173455openalex-snapshot
Compact Implementations of ARX-Based Block Ciphers on IoT Processors
inferredcites →https://doi.org/10.1155/2019/5323578openalex-snapshot
Compact Implementations of HIGHT Block Cipher on IoT Platforms
inferredcites →https://doi.org/10.14257/ijsia.2014.8.2.06openalex-snapshot
Parallel Architecture for High-Speed Block Cipher, HIGHT
inferredcites →https://doi.org/10.3390/s140100975openalex-snapshot
Efficient Hardware Implementation of the Lightweight Block Encryption Algorithm LEA
inferredcites →https://doi.org/10.46586/tches.v2018.i3.469-499openalex-snapshot
FACE: Fast AES CTR mode Encryption Techniques based on the Reuse of Repetitive Data
inferredcites →https://doi.org/10.6109/jkiice.2018.22.8.1133openalex-snapshot
High Speed Implementation of LEA on ARM Cortex-M3 processor

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/j.icte.2025.07.007openalex-snapshot
Optimized implementation of SMAUG-T on resource-constrained 16-bit MSP430 MCU
inferred← citeshttps://doi.org/10.1109/access.2021.3059623openalex-snapshot
Efficient Implementation of AES and CTR_DRBG on 8-Bit AVR-Based Sensor Nodes
inferred← citeshttps://doi.org/10.1109/access.2022.3195217openalex-snapshot
Optimized Implementation of SM4 on AVR Microcontrollers, RISC-V Processors, and ARM Processors
inferred← citeshttps://doi.org/10.1109/ants52808.2021.9936950openalex-snapshot
Performance Evaluation of ANU block cipher on 8-bit AVR for IoT node security
inferred← citeshttps://doi.org/10.1145/3708821.3733873openalex-snapshot
An Optimized Instantiation of Post-Quantum MQTT protocol on 8-bit AVR Sensor Nodes
inferred← citeshttps://doi.org/10.24086/cocos2022/paper.513openalex-snapshot
ANALYSIS THE SECURITY OF SOME CIPHERS IN INDUSTRIAL APPLICATIONS OF WIRELESS SENSORS NETWORKS
inferred← citeshttps://doi.org/10.24086/cuesj.v5n2y2021.pp13-19openalex-snapshot
Analysis the Structures of Some Symmetric Cipher Algorithms Suitable for the Security of IoT Devices
inferred← citeshttps://doi.org/10.3390/app11062548openalex-snapshot
Efficient Parallel Implementation of CTR Mode of ARX-Based Block Ciphers on ARMv8 Microcontrollers
inferred← citeshttps://doi.org/10.3390/electronics10080908openalex-snapshot
Compact Implementation of ARIA on 16-Bit MSP430 and 32-Bit ARM Cortex-M3 Microcontrollers
inferred← citeshttps://doi.org/10.3390/math9040374openalex-snapshot
High-Speed Implementation of PRESENT on AVR Microcontroller
inferred← citeshttps://doi.org/10.3390/math9091044openalex-snapshot
Secure HIGHT Implementation on ARM Processors
inferred← citeshttps://doi.org/10.3390/su13084324openalex-snapshot
Chaining Optimization Methodology: A New SHA-3 Implementation on Low-End Microcontrollers
inferred← citeshttps://doi.org/10.55056/ceur-ws.org/vol-3790/paper9.pdfopenalex-snapshot
Hardware encryptors and cryptographic libraries for optimizing security in IoT
inferred← citeshttps://doi.org/10.9728/dcs.2021.22.12.2063openalex-snapshot
A Study of Fast Implementation of Korea Block Ciphers PIPO, HIGHT, and CHAM
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