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Parallel Fixed Point Implementation of a Radial Basis Function Network in an FPGA

https://doi.org/10.3390/s141018223
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/9780470127896openalex-snapshot
Advanced FPGA Design
inferredcites →https://doi.org/10.1016/j.engappai.2004.08.011openalex-snapshot
Artificial neural networks: a review of commercial hardware
inferredcites →https://doi.org/10.1016/j.matcom.2012.05.006openalex-snapshot
SOM neural network design – A new Simulink library based approach targeting FPGA implementation
inferredcites →https://doi.org/10.1016/j.neucom.2010.03.021openalex-snapshot
Artificial neural networks in hardware: A survey of two decades of progress
inferredcites →https://doi.org/10.1109/72.950152openalex-snapshot
Efficient training of RBF neural networks for pattern recognition
inferredcites →https://doi.org/10.1109/fpt.2009.5377666openalex-snapshot
PGR: Period and glitch reduction via clock skew scheduling, delay padding and GlitchLess
inferredcites →https://doi.org/10.1109/iccca.2012.6179225openalex-snapshot
FPGA implementation of multilayer feed forward neural network architecture using VHDL
inferredcites →https://doi.org/10.1109/icces.2008.4773010openalex-snapshot
FPGA-based neuro-architecture intrusion detection system
inferredcites →https://doi.org/10.1109/icics.2007.4449624openalex-snapshot
Radial basis function implementation of intelligent pressure sensor on field programmable gate array
inferredcites →https://doi.org/10.1109/icsccn.2011.6024574openalex-snapshot
Implementation of neural network based controller using Verilog
inferredcites →https://doi.org/10.1109/icsccw.2009.5379485openalex-snapshot
EOG controlled mobile robot using Radial Basis Function Networks
inferredcites →https://doi.org/10.1109/ictta.2008.4530261openalex-snapshot
FPGA Implementation of Artificial Neurons: Comparison study
inferredcites →https://doi.org/10.1109/ijcnn.2008.4633820openalex-snapshot
Implementation of the RBF neural chip with the on-line learning back-propagation algorithm
inferredcites →https://doi.org/10.1109/ijcnn.2009.5178680openalex-snapshot
Realizing general MLP networks with minimal FPGA resources
inferredcites →https://doi.org/10.1109/indin.2008.4618269openalex-snapshot
Evaluation of embedded RBF neural chip with back-propagation algorithm for pattern recognition tasks
inferredcites →https://doi.org/10.1109/isie.2009.5214284openalex-snapshot
FPGA-based self-tuning PID controller using RBF neural network and its application in X-Y table
inferredcites →https://doi.org/10.1109/isie.2009.5221750openalex-snapshot
Joint control of ROBOKER arm using a neural chip embedded on FPGA
inferredcites →https://doi.org/10.1109/optim.2008.4602496openalex-snapshot
Neural control based on RBF network implemented on FPGA
inferredcites →https://doi.org/10.1109/optim.2010.5510377openalex-snapshot
Optimal FPGA implementation of GAMLP systems
inferredcites →https://doi.org/10.1109/optim.2010.5510449openalex-snapshot
Optimal FPGA implementation of GARBF systems
inferredcites →https://doi.org/10.1109/ssd.2010.5585520openalex-snapshot
Hardware implementation of pulse mode RBFNN based edge detection system on virtex V platform
inferredcites →https://doi.org/10.1109/tcad.2007.896319openalex-snapshot
Interconnect Criticality-Driven Delay Relaxation
inferredcites →https://doi.org/10.1109/tcomm.2008.060004openalex-snapshot
A nonlinear electrical equalizer with decision feedback for OOK optical communication systems
inferredcites →https://doi.org/10.1109/tii.2011.2158843openalex-snapshot
FPGA Implementation of the Multilayer Neural Network for the Speed Estimation of the Two-Mass Drive System
inferredcites →https://doi.org/10.1109/tnn.2003.816035openalex-snapshot
Implementation of an rbf neural network on embedded systems: real-time face tracking and identity verification
inferredcites →https://doi.org/10.1109/tnn.2006.883002openalex-snapshot
The Impact of Arithmetic Representation on Implementing MLP-BP on FPGAs: A Study
inferredcites →https://doi.org/10.1109/tsmcc.2009.2038279openalex-snapshot
Channel Equalization Using Neural Networks: A Review
inferredcites →https://doi.org/10.1117/12.682529openalex-snapshot
FPGA-based artificial neural network using CORDIC modules
inferredcites →https://doi.org/10.3390/s130303848openalex-snapshot
Efficient VLSI Architecture for Training Radial Basis Function Networks
inferredcites →https://doi.org/10.4236/jsea.2011.45036openalex-snapshot
FPGA Simulation of Linear and Nonlinear Support Vector Machine

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-319-24584-3_89openalex-snapshot
Possibility of Hybrid Multilayered Perceptron Neural Network Realisation on FPGA and Its Challenges
inferred← citeshttps://doi.org/10.1007/s00521-021-05706-3openalex-snapshot
Hardware implementation of radial-basis neural networks with Gaussian activation functions on FPGA
inferred← citeshttps://doi.org/10.1016/j.biosystems.2026.105714openalex-snapshot
A precision-aware spike timing determination in Courbage–Nekorkin–Vdovin neuron map model: Statistical approaches and FPGA-based realization
inferred← citeshttps://doi.org/10.1016/j.conengprac.2016.12.004openalex-snapshot
Efficient hardware implementation of radial basis function neural network with customized-precision floating-point operations
inferred← citeshttps://doi.org/10.1016/j.micpro.2019.06.007openalex-snapshot
A parallel implementation of sequential minimal optimization on FPGA
inferred← citeshttps://doi.org/10.1016/j.ymssp.2015.05.022openalex-snapshot
Cascaded evolutionary algorithm for nonlinear system identification based on correlation functions and radial basis functions neural networks
inferred← citeshttps://doi.org/10.1109/access.2018.2885950openalex-snapshot
Parallel Implementation of Reinforcement Learning Q-Learning Technique for FPGA
inferred← citeshttps://doi.org/10.1109/access.2019.2907261openalex-snapshot
Deep Neural Network Hardware Implementation Based on Stacked Sparse Autoencoder
inferred← citeshttps://doi.org/10.1109/i2mtc.2018.8409583openalex-snapshot
UAV sensor data anomaly detection using predictor with uncertainty estimation and its acceleration on FPGA
inferred← citeshttps://doi.org/10.1109/iccd.2015.7357142openalex-snapshot
Data-driven logic synthesizer for acceleration of Forward propagation in artificial neural networks
inferred← citeshttps://doi.org/10.1109/icssit48917.2020.9214265openalex-snapshot
Highly Scalable Processor Architecture for Reinforcement Learning
inferred← citeshttps://doi.org/10.1109/med.2016.7535908openalex-snapshot
Nonlinear model predictive control hardware implementation with custom-precision floating point operations
inferred← citeshttps://doi.org/10.1109/rcar49640.2020.9303043openalex-snapshot
Autobot for Effective Design Space Exploration and Agile Generation of RBFNN Hardware Accelerator in Embedded Real-time Computing
inferred← citeshttps://doi.org/10.1109/tbcas.2022.3161133openalex-snapshot
Data-Driven Real-Time Magnetic Tracking Applied to Myokinetic Interfaces
inferred← citeshttps://doi.org/10.1109/tcsii.2019.2895343openalex-snapshot
Parallel Implementation of Particle Swarm Optimization on FPGA
inferred← citeshttps://doi.org/10.1109/tencon.2019.8929442openalex-snapshot
A Parallel and Distributed Radial Basis Function Network for Big Data Analytics
inferred← citeshttps://doi.org/10.14710/jtsiskom.8.1.2020.64-68openalex-snapshot
Combination of SOM-RBF for drought code prediction using rainfall and air temperature data
inferred← citeshttps://doi.org/10.3390/electronics9010081openalex-snapshot
LOCOFloat: A Low-Cost Floating-Point Format for FPGAs.: Application to HIL Simulators
inferred← citeshttps://doi.org/10.3390/electronics9101597openalex-snapshot
Real-time Neural Networks Implementation Proposal for Microcontrollers
inferred← citeshttps://doi.org/10.3390/en9080572openalex-snapshot
A Run-Time Dynamic Reconfigurable Computing System for Lithium-Ion Battery Prognosis
inferred← citeshttps://doi.org/10.3390/s19092090openalex-snapshot
Mixed Natural Gas Online Recognition Device Based on a Neural Network Algorithm Implemented by an FPGA
inferred← citeshttps://doi.org/10.3390/s19184011openalex-snapshot
An FPGA-Based Neuro-Fuzzy Sensor for Personalized Driving Assistance
inferred← citeshttps://doi.org/10.3390/s20071996openalex-snapshot
Proposal of Takagi–Sugeno Fuzzy-PI Controller Hardware
inferred← citeshttps://doi.org/10.3390/s20154191openalex-snapshot
FPGA-Based Implementation of Stochastic Configuration Networks for Regression Prediction
inferred← citeshttps://doi.org/10.3390/s22093556openalex-snapshot
Prediction Techniques on FPGA for Latency Reduction on Tactile Internet
inferred← citeshttps://doi.org/10.3390/s22207851openalex-snapshot
FPGA Applied to Latency Reduction for the Tactile Internet
inferred← citeshttps://doi.org/10.5753/sbseg.2017.19489openalex-snapshot
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