On the public citation graph

Interplay Of Power Management At Core And Server Level

https://doi.org/10.5281/zenodo.1338685
0 signed · 17 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/s00450-014-0270-zopenalex-extracted
Wake-up latencies for processor idle states on current x86 processors
inferredcites →https://doi.org/10.1109/ccgrid.2013.90openalex-extracted
Heterogeneity: The Key to Achieve Power-Proportional Computing
inferredcites →https://doi.org/10.1109/hpca.2011.5749737openalex-extracted
A case for guarded power gating for multi-core processors
inferredcites →https://doi.org/10.1109/jssc.1974.1050511openalex-extracted
Design of ion-implanted MOSFET's with very small physical dimensions
inferredcites →https://doi.org/10.1109/l-ca.2009.46openalex-extracted
Power Management of Datacenter Workloads Using Per-Core Power Gating
inferredcites →https://doi.org/10.1109/mc.2007.443openalex-extracted
The Case for Energy-Proportional Computing
inferredcites →https://doi.org/10.1109/mm.2011.42openalex-extracted
Scaling with Design Constraints: Predicting the Future of Big Chips
inferredcites →https://doi.org/10.1109/mm.2011.77openalex-extracted
Toward Dark Silicon in Servers
inferredcites →https://doi.org/10.1109/mm.2013.74openalex-extracted
Implications of the Power Wall: Dim Cores and Reconfigurable Logic
inferredcites →https://doi.org/10.1109/mm.2013.90openalex-extracted
A Landscape of the New Dark Silicon Design Regime
inferredcites →https://doi.org/10.1109/rtas.2014.6926010openalex-extracted
Unifying DVFS and offlining in mobile multicores
inferredcites →https://doi.org/10.1145/1735971.1736044openalex-extracted
Conservation cores
inferredcites →https://doi.org/10.1145/2228360.2228567openalex-extracted
Is dark silicon useful?
inferredcites →https://doi.org/10.1145/2324876.2324879openalex-extracted
Power Limitations and Dark Silicon Challenge the Future of Multicore
inferredcites →https://doi.org/10.1145/2626401.2626411openalex-extracted
Mobile multicores

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/j.neucom.2016.08.134openalex-snapshot
Fault-tolerant system design on cloud logistics by greener standbys deployment with Petri net model
inferred← citeshttps://doi.org/10.1109/pdp.2017.30openalex-snapshot
Fault-Tolerant Parallel Execution of Workflows with Deadlines
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.