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Cryptographic hardware and embedded systems - CHES 2005 : 7th International Workshop, Edinburgh, UK, August 29-September 1, 2005 : proceedings

https://doi.org/10.1007/11545262
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inferred← citeshttps://doi.org/10.1007/11545262_12openalex-snapshot
Successfully Attacking Masked AES Hardware Implementations
inferred← citeshttps://doi.org/10.1007/11733447_11openalex-snapshot
Power Analysis to ECC Using Differential Power Between Multiplication and Squaring
inferred← citeshttps://doi.org/10.1007/11733447_9openalex-snapshot
Generic Cryptanalysis of Combined Countermeasures with Randomized BSD Representations
inferred← citeshttps://doi.org/10.1007/11807964_38openalex-snapshot
Energy Comparison of AES and SHA-1 for Ubiquitous Computing
inferred← citeshttps://doi.org/10.1007/11894063_15openalex-snapshot
High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching
inferred← citeshttps://doi.org/10.1007/11908739_24openalex-snapshot
On the Effectiveness of TMTO and Exhaustive Search Attacks
inferred← citeshttps://doi.org/10.1007/11908739_25openalex-snapshot
Low Power AES Hardware Architecture for Radio Frequency Identification
inferred← citeshttps://doi.org/10.1007/11967668_17openalex-snapshot
Differential Power Analysis of Stream Ciphers
inferred← citeshttps://doi.org/10.1007/11967668_24openalex-snapshot
Public Key Cryptography and RFID Tags
inferred← citeshttps://doi.org/10.1007/3-540-28428-1_1openalex-snapshot
Embedded IT Security in Automotive Application — An Emerging Area
inferred← citeshttps://doi.org/10.1007/978-0-387-71817-0_3openalex-snapshot
Evaluation Criteria for Physical Random Number Generators
inferred← citeshttps://doi.org/10.1007/978-0-387-71829-3_9openalex-snapshot
Counteracting Power Analysis Attacks by Masking
inferred← citeshttps://doi.org/10.1007/978-1-4614-6783-0_8openalex-snapshot
Toward the Evaluation of an Implementation Against Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-030-41702-4_5openalex-snapshot
Monomial Evaluation of Polynomial Functions Protected by Threshold Implementations
inferred← citeshttps://doi.org/10.1007/978-3-031-25319-5_8openalex-snapshot
Self-timed Masking: Implementing Masked S-Boxes Without Registers
inferred← citeshttps://doi.org/10.1007/978-3-319-01854-6_41openalex-snapshot
A Toolbox for DPA Attacks to Smart Cards
inferred← citeshttps://doi.org/10.1007/978-3-319-02726-5_18openalex-snapshot
Comprehensive Evaluation of AES Dual Ciphers as a Side-Channel Countermeasure
inferred← citeshttps://doi.org/10.1007/978-3-319-02726-5_22openalex-snapshot
Efficient Implementation of NIST-Compliant Elliptic Curve Cryptography for Sensor Nodes
inferred← citeshttps://doi.org/10.1007/978-3-319-03515-4_14openalex-snapshot
On the Relationship between Correlation Power Analysis and the Stochastic Approach: An ASIC Designer Perspective
inferred← citeshttps://doi.org/10.1007/978-3-319-03515-4_15openalex-snapshot
Multi-precision Squaring for Public-Key Cryptography on Embedded Microprocessors
inferred← citeshttps://doi.org/10.1007/978-3-319-03584-0_33openalex-snapshot
An Improved Differential Fault Analysis Attack to AES Using Reduced Searching Space
inferred← citeshttps://doi.org/10.1007/978-3-319-04852-9_11openalex-snapshot
Hardware Implementation and Side-Channel Analysis of Lapin
inferred← citeshttps://doi.org/10.1007/978-3-319-04873-4_2openalex-snapshot
Weakness of $\mathbb{F}_{3^{6 \cdot 509}}$ for Discrete Logarithm Cryptography
inferred← citeshttps://doi.org/10.1007/978-3-319-06734-6_15openalex-snapshot
Minimizing S-Boxes in Hardware by Utilizing Linear Transformations
inferred← citeshttps://doi.org/10.1007/978-3-319-06734-6_25openalex-snapshot
DRECON: DPA Resistant Encryption by Construction
inferred← citeshttps://doi.org/10.1007/978-3-319-08302-5_13openalex-snapshot
Efficient and First-Order DPA Resistant Implementations of Keccak
inferred← citeshttps://doi.org/10.1007/978-3-319-08302-5_4openalex-snapshot
On the Vulnerability of Low Entropy Masking Schemes
inferred← citeshttps://doi.org/10.1007/978-3-319-08302-5_7openalex-snapshot
Optimization of Power Analysis Using Neural Network
inferred← citeshttps://doi.org/10.1007/978-3-319-09843-2_10openalex-snapshot
How to Effectively Decrease the Resource Requirement in Template Attack?
inferred← citeshttps://doi.org/10.1007/978-3-319-09879-1_22openalex-snapshot
Combined AES + AEGIS Architectures for High Performance and Lightweight Security Applications
inferred← citeshttps://doi.org/10.1007/978-3-319-10175-0_10openalex-snapshot
Collision-Correlation Attack Against a First-Order Masking Scheme for MAC Based on SHA-3
inferred← citeshttps://doi.org/10.1007/978-3-319-10175-0_12openalex-snapshot
On the Optimal Pre-processing for Non-profiling Differential Power Analysis
inferred← citeshttps://doi.org/10.1007/978-3-319-10175-0_9openalex-snapshot
Support Vector Machines for Improved IP Detection with Soft Physical Hash Functions
inferred← citeshttps://doi.org/10.1007/978-3-319-12060-7_8openalex-snapshot
Differential Power Analysis Attack on SIMON and LED Block Ciphers
inferred← citeshttps://doi.org/10.1007/978-3-319-12060-7_9openalex-snapshot
Khudra: A New Lightweight Block Cipher for FPGAs
inferred← citeshttps://doi.org/10.1007/978-3-319-12087-4_21openalex-snapshot
Multivariate Leakage Model for Improving Non-profiling DPA on Noisy Power Traces
inferred← citeshttps://doi.org/10.1007/978-3-319-12160-4_6openalex-snapshot
Enabling 3-Share Threshold Implementations for all 4-Bit S-Boxes
inferred← citeshttps://doi.org/10.1007/978-3-319-13039-2_22openalex-snapshot
Confused by Confusion: Systematic Evaluation of DPA Resistance of Various S-boxes
inferred← citeshttps://doi.org/10.1007/978-3-319-13039-2_4openalex-snapshot
Recovering CRT-RSA Secret Keys from Message Reduced Values with Side-Channel Analysis
inferred← citeshttps://doi.org/10.1007/978-3-319-13051-4_13openalex-snapshot
Side-Channel Analysis of Montgomery’s Representation Randomization
inferred← citeshttps://doi.org/10.1007/978-3-319-15087-1_25openalex-snapshot
Successful Profiling Attacks with Different Measurement Environments for Each Phase
inferred← citeshttps://doi.org/10.1007/978-3-319-66787-4_30openalex-snapshot
Very High Order Masking: Efficient Implementation and Security Evaluation
inferred← citeshttps://doi.org/10.1007/978-3-540-68111-3_77openalex-snapshot
A Large-Scale Semantic Grid Repository
inferred← citeshttps://doi.org/10.1007/978-3-540-68164-9_15openalex-snapshot
Yet Another Attack on Vest
inferred← citeshttps://doi.org/10.1007/978-3-540-68164-9_2openalex-snapshot
Implementation of the AES-128 on Virtex-5 FPGAs
inferred← citeshttps://doi.org/10.1007/978-3-540-68164-9_27openalex-snapshot
Efficient Multiplication in $\mathbb{F}_{3^{\ell m}}$ , m ≥ 1 and 5 ≤ ℓ ≤ 18
inferred← citeshttps://doi.org/10.1007/978-3-540-70550-5_12openalex-snapshot
Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors
inferred← citeshttps://doi.org/10.1007/978-3-540-71431-6_20openalex-snapshot
Multiplication over $\mathbb{F}_{{p}^{m}}$ on FPGA: A Survey
inferred← citeshttps://doi.org/10.1007/978-3-540-72738-5_10openalex-snapshot
Protecting AES Software Implementations on 32-Bit Processors Against Power Analysis
inferred← citeshttps://doi.org/10.1007/978-3-540-73074-3_4openalex-snapshot
A Coprocessor for the Final Exponentiation of the η T Pairing in Characteristic Three
inferred← citeshttps://doi.org/10.1007/978-3-540-73074-3_8openalex-snapshot
Software Implementation of Arithmetic in
inferred← citeshttps://doi.org/10.1007/978-3-540-73458-1_18openalex-snapshot
Double-Size Bipartite Modular Multiplication
inferred← citeshttps://doi.org/10.1007/978-3-540-73625-7_45openalex-snapshot
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks
inferred← citeshttps://doi.org/10.1007/978-3-540-74462-7_10openalex-snapshot
Changing the Odds Against Masked Logic
inferred← citeshttps://doi.org/10.1007/978-3-540-74462-7_12openalex-snapshot
Blind Differential Cryptanalysis for Enhanced Power Attacks
inferred← citeshttps://doi.org/10.1007/978-3-540-74462-7_20openalex-snapshot
On Redundant τ-Adic Expansions and Non-adjacent Digit Sets
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_14openalex-snapshot
Two New Techniques of Side-Channel Cryptanalysis
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_17openalex-snapshot
Arithmetic Operators for Pairing-Based Cryptography
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_2openalex-snapshot
Gaussian Mixture Models for Higher-Order Side Channel Analysis
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_21openalex-snapshot
Power Analysis Resistant AES Implementation with Instruction Set Extensions
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_25openalex-snapshot
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_3openalex-snapshot
Side Channel Cryptanalysis of a Higher Order Masking Scheme
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_30openalex-snapshot
On the Implementation of a Fast Prime Generation Algorithm
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_4openalex-snapshot
High-Speed True Random Number Generation with Logic Gates Only
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_6openalex-snapshot
Evaluation of the Masked Logic Style MDPL on a Prototype Chip
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_7openalex-snapshot
Masking and Dual-Rail Logic Don’t Add Up
inferred← citeshttps://doi.org/10.1007/978-3-540-74735-2_9openalex-snapshot
On the Power of Bitslice Implementation on Intel Core2 Processor
inferred← citeshttps://doi.org/10.1007/978-3-540-74784-0_28openalex-snapshot
Dual-Residue Montgomery Multiplication
inferred← citeshttps://doi.org/10.1007/978-3-540-74835-9_30openalex-snapshot
Analyzing Side Channel Leakage of Masked Implementations with Stochastic Methods
inferred← citeshttps://doi.org/10.1007/978-3-540-75496-1_5openalex-snapshot
Traitor Tracing with Optimal Transmission Rate
inferred← citeshttps://doi.org/10.1007/978-3-540-76788-6_21openalex-snapshot
Power Analysis Attacks on MDPL and DRSL Implementations
inferred← citeshttps://doi.org/10.1007/978-3-540-76993-4_44openalex-snapshot
Web Service Composition: A Reality Check
inferred← citeshttps://doi.org/10.1007/978-3-540-77010-7_27openalex-snapshot
Web Service Search: Who, When, What, and How
inferred← citeshttps://doi.org/10.1007/978-3-540-77026-8_16openalex-snapshot
First-Order Differential Power Analysis on the Duplication Method
inferred← citeshttps://doi.org/10.1007/978-3-540-77026-8_29openalex-snapshot
Design of a Differential Power Analysis Resistant Masked AES S-Box
inferred← citeshttps://doi.org/10.1007/978-3-540-77026-8_33openalex-snapshot
Efficient Implementations of Some Tweakable Enciphering Schemes in Reconfigurable Hardware
inferred← citeshttps://doi.org/10.1007/978-3-540-77048-0_17openalex-snapshot
Compact and Secure Design of Masked AES S-Box
inferred← citeshttps://doi.org/10.1007/978-3-540-77086-2_13openalex-snapshot
Information Leakage Via Electromagnetic Emanations and Evaluation of Tempest Countermeasures
inferred← citeshttps://doi.org/10.1007/978-3-540-77086-2_7openalex-snapshot
A Near Optimal S-Box Design
inferred← citeshttps://doi.org/10.1007/978-3-540-77272-9_21openalex-snapshot
Efficient 15,360-bit RSA Using Woop-Optimised Montgomery Arithmetic
inferred← citeshttps://doi.org/10.1007/978-3-540-77360-3_12openalex-snapshot
Explicit Formulas for Efficient Multiplication in $\mathbb{F}_{3^{6m}}$
inferred← citeshttps://doi.org/10.1007/978-3-540-77535-5_17openalex-snapshot
A Generic Method for Secure SBox Implementation
inferred← citeshttps://doi.org/10.1007/978-3-540-77535-5_23openalex-snapshot
Differential Power Analysis of HMAC Based on SHA-2, and Countermeasures
inferred← citeshttps://doi.org/10.1007/978-3-540-77566-9_9openalex-snapshot
Trusted Computing — Special Aspects and Challenges
inferred← citeshttps://doi.org/10.1007/978-3-540-78440-1_19openalex-snapshot
A Parameterized Splitting System and Its Application to the Discrete Logarithm Problem with Low Hamming Weight Product Exponents
inferred← citeshttps://doi.org/10.1007/978-3-540-78610-8_11openalex-snapshot
Physical Design of FPGA Interconnect to Prevent Information Leakage
inferred← citeshttps://doi.org/10.1007/978-3-540-79104-1_21openalex-snapshot
An Efficient Countermeasure against Side Channel Attacks for Pairing Computation
inferred← citeshttps://doi.org/10.1007/978-3-540-79263-5_11openalex-snapshot
Boosting AES Performance on a Tiny Processor Core
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_10openalex-snapshot
A Design for a Physical RNG with Robust Entropy Estimators
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_11openalex-snapshot
Fast Digital TRNG Based on Metastable Ring Oscillator
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_13openalex-snapshot
The Carry Leakage on the Randomized Exponent Countermeasure
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_14openalex-snapshot
Recovering Secret Keys from Weak Side Channel Traces of Differing Lengths
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_15openalex-snapshot
Attacking State-of-the-Art Software Countermeasures—A Case Study for AES
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_21openalex-snapshot
Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_25openalex-snapshot
Divided Backend Duplication Methodology for Balanced Dual Rail Routing
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_26openalex-snapshot
Using Subspace-Based Template Attacks to Compare and Combine Power and Electromagnetic Information Leakages
inferred← citeshttps://doi.org/10.1007/978-3-540-85053-3_8openalex-snapshot
A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis
inferred← citeshttps://doi.org/10.1007/978-3-540-85174-5_12openalex-snapshot
On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoq Code Hopping Scheme
inferred← citeshttps://doi.org/10.1007/978-3-540-85538-5_19openalex-snapshot
Faster Implementation of η T Pairing over GF(3 m ) Using Minimum Number of Logical Instructions for GF(3)-Addition
inferred← citeshttps://doi.org/10.1007/978-3-540-85538-5_20openalex-snapshot
A Comparison between Hardware Accelerators for the Modified Tate Pairing over $\mathbb{F}_{2^m}$ and $\mathbb{F}_{3^m}$
inferred← citeshttps://doi.org/10.1007/978-3-540-85855-3_16openalex-snapshot
Using Normal Bases for Compact Hardware Implementations of the AES S-Box
inferred← citeshttps://doi.org/10.1007/978-3-540-85893-5_15openalex-snapshot
A Practical DPA Countermeasure with BDD Architecture
inferred← citeshttps://doi.org/10.1007/978-3-540-85893-5_6openalex-snapshot
A Black Hen Lays White Eggs
inferred← citeshttps://doi.org/10.1007/978-3-540-88403-3_15openalex-snapshot
Side Channels in the McEliece PKC
inferred← citeshttps://doi.org/10.1007/978-3-540-89754-5_28openalex-snapshot
Chai-Tea, Cryptographic Hardware Implementations of xTEA
inferred← citeshttps://doi.org/10.1007/978-3-540-89985-3_81openalex-snapshot
On the Importance of the Number of Fanouts to Prevent the Glitches in DPA-Resistant Devices
inferred← citeshttps://doi.org/10.1007/978-3-540-95948-9_34openalex-snapshot
Differential Capacitance Analysis
inferred← citeshttps://doi.org/10.1007/978-3-642-00587-9_8openalex-snapshot
Revocation of TPM Keys
inferred← citeshttps://doi.org/10.1007/978-3-642-00641-8_18openalex-snapshot
Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform
inferred← citeshttps://doi.org/10.1007/978-3-642-00641-8_20openalex-snapshot
Improving Throughput of AES-GCM with Pipelined Karatsuba Multipliers on FPGAs
inferred← citeshttps://doi.org/10.1007/978-3-642-00730-9_14openalex-snapshot
Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches
inferred← citeshttps://doi.org/10.1007/978-3-642-00730-9_16openalex-snapshot
Partition vs. Comparison Side-Channel Distinguishers: An Empirical Evaluation of Statistical Tests for Univariate Side-Channel Attacks against Two Unprotected CMOS Devices
inferred← citeshttps://doi.org/10.1007/978-3-642-00862-7_14openalex-snapshot
Practical Attacks on Masked Hardware
inferred← citeshttps://doi.org/10.1007/978-3-642-00862-7_29openalex-snapshot
Fault Analysis Attack against an AES Prototype Chip Using RSL
inferred← citeshttps://doi.org/10.1007/978-3-642-00862-7_30openalex-snapshot
Evaluation of the Detached Power Supply as Side-Channel Analysis Countermeasure for Passive UHF RFID Tags
inferred← citeshttps://doi.org/10.1007/978-3-642-01001-9_26openalex-snapshot
A Unified Framework for the Analysis of Side-Channel Key Recovery Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-01957-9_30openalex-snapshot
How to Compare Profiled Side-Channel Attacks?
inferred← citeshttps://doi.org/10.1007/978-3-642-01957-9_32openalex-snapshot
Attacking ECDSA-Enabled RFID Devices
inferred← citeshttps://doi.org/10.1007/978-3-642-03944-7_9openalex-snapshot
Energy-Efficient Implementation of ECDH Key Exchange for Wireless Sensor Networks
inferred← citeshttps://doi.org/10.1007/978-3-642-04138-9_15openalex-snapshot
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
inferred← citeshttps://doi.org/10.1007/978-3-642-04138-9_6openalex-snapshot
Practical Electromagnetic Template Attack on HMAC
inferred← citeshttps://doi.org/10.1007/978-3-642-04138-9_9openalex-snapshot
Differential Cluster Analysis
inferred← citeshttps://doi.org/10.1007/978-3-642-04159-4_11openalex-snapshot
On the Exact Success Rate of Side Channel Analysis in the Gaussian Model
inferred← citeshttps://doi.org/10.1007/978-3-642-04434-2_16openalex-snapshot
Safe, Fault Tolerant and Capture-Resilient Environmental Parameters Survey Using WSNs
inferred← citeshttps://doi.org/10.1007/978-3-642-05445-7_10openalex-snapshot
A More Compact AES
inferred← citeshttps://doi.org/10.1007/978-3-642-05445-7_23openalex-snapshot
An Efficient Residue Group Multiplication for the η T Pairing over ${\mathbb F}_{3^m}$
inferred← citeshttps://doi.org/10.1007/978-3-642-10366-7_39openalex-snapshot
Cache-Timing Template Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-10838-9_12openalex-snapshot
Unknown Plaintext Template Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-10838-9_13openalex-snapshot
On Comparing Side-Channel Preprocessing Techniques for Attacking RFID Devices
inferred← citeshttps://doi.org/10.1007/978-3-642-10838-9_15openalex-snapshot
A Comparative Study of Mutual Information Analysis under a Gaussian Assumption
inferred← citeshttps://doi.org/10.1007/978-3-642-10838-9_27openalex-snapshot
Practical Broadcast Authentication Using Short-Lived Signatures in WSNs
inferred← citeshttps://doi.org/10.1007/978-3-642-10838-9_6openalex-snapshot
Mechanism behind Information Leakage in Electromagnetic Analysis of Cryptographic Modules
inferred← citeshttps://doi.org/10.1007/978-3-642-10868-6_27openalex-snapshot
Optimal Recovery of Secret Keys from Weak Side Channel Traces
inferred← citeshttps://doi.org/10.1007/978-3-642-11925-5_16openalex-snapshot
Revisiting Higher-Order DPA Attacks:
inferred← citeshttps://doi.org/10.1007/978-3-642-12368-9_5openalex-snapshot
Evaluation Metrics of Physical Non-invasive Security
inferred← citeshttps://doi.org/10.1007/978-3-642-12510-2_2openalex-snapshot
Enhance Multi-bit Spectral Analysis on Hiding in Temporal Dimension
inferred← citeshttps://doi.org/10.1007/978-3-642-12510-2_4openalex-snapshot
Side-Channel Leakage across Borders
inferred← citeshttps://doi.org/10.1007/978-3-642-13708-2_10openalex-snapshot
High Performance GHASH Function for Long Messages
inferred← citeshttps://doi.org/10.1007/978-3-642-13708-2_12openalex-snapshot
Adaptive Chosen-Message Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-14423-3_11openalex-snapshot
Power Analysis of Single-Rail Storage Elements as Used in MDPL
inferred← citeshttps://doi.org/10.1007/978-3-642-14423-3_12openalex-snapshot
A Timing Attack against Patterson Algorithm in the McEliece PKC
inferred← citeshttps://doi.org/10.1007/978-3-642-14712-8_17openalex-snapshot
Defeating Any Secret Cryptography with SCARE Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-14712-8_18openalex-snapshot
How Leaky Is an Extractor?
inferred← citeshttps://doi.org/10.1007/978-3-642-14992-4_7openalex-snapshot
Lightweight Cryptography and DPA Countermeasures: A Survey
inferred← citeshttps://doi.org/10.1007/978-3-642-15031-9_16openalex-snapshot
Mixed Bases for Efficient Inversion in ${{\mathbb F}{((2^2)^2)}{2}}$ and Conversion Matrices of SubBytes of AES
inferred← citeshttps://doi.org/10.1007/978-3-642-15031-9_29openalex-snapshot
Algebraic Side-Channel Analysis in the Presence of Errors
inferred← citeshttps://doi.org/10.1007/978-3-642-16644-0_21openalex-snapshot
Stealthy Compromise of Wireless Sensor Nodes with Power Analysis Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-16767-6_3openalex-snapshot
Side-Channel Analysis – Mathematics Has Met Engineering
inferred← citeshttps://doi.org/10.1007/978-3-642-16767-6_4openalex-snapshot
Survey of Methods to Improve Side-Channel Resistance on Partial Reconfigurable Platforms
inferred← citeshttps://doi.org/10.1007/978-3-642-17373-8_7openalex-snapshot
The World Is Not Enough: Another Look on Second-Order DPA
inferred← citeshttps://doi.org/10.1007/978-3-642-17401-8_19openalex-snapshot
Attack on a Higher-Order Masking of the AES Based on Homographic Functions
inferred← citeshttps://doi.org/10.1007/978-3-642-17499-5_4openalex-snapshot
Building a Side Channel Based Disassembler
inferred← citeshttps://doi.org/10.1007/978-3-642-17619-7_5openalex-snapshot
Performance and Security Aspects of Client-Side SSL/TLS Processing on Mobile Devices
inferred← citeshttps://doi.org/10.1007/978-3-642-17955-6_13openalex-snapshot
Combined Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-17955-6_19openalex-snapshot
Combination of SW Countermeasure and CPU Modification on FPGA against Power Analysis
inferred← citeshttps://doi.org/10.1007/978-3-642-19074-2_7openalex-snapshot
Cryptanalysis of CLEFIA Using Differential Methods with Cache Trace Patterns
inferred← citeshttps://doi.org/10.1007/978-3-642-20465-4_6openalex-snapshot
Pushing the Limits: A Very Compact and a Threshold Implementation of AES
inferred← citeshttps://doi.org/10.1007/978-3-642-21031-0_15openalex-snapshot
How to Characterize Side-Channel Leakages More Accurately?
inferred← citeshttps://doi.org/10.1007/978-3-642-21040-2_14openalex-snapshot
Leakage Squeezing Countermeasure against High-Order Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-21040-2_7openalex-snapshot
Formal Framework for the Evaluation of Waveform Resynchronization Algorithms
inferred← citeshttps://doi.org/10.1007/978-3-642-21518-6_33openalex-snapshot
Characterization of the Electromagnetic Side Channel in Frequency Domain
inferred← citeshttps://doi.org/10.1007/978-3-642-21554-4_23openalex-snapshot
Towards User-Friendly Credential Transfer on Open Credential Platforms
inferred← citeshttps://doi.org/10.1007/978-3-642-23951-9_14openalex-snapshot
Breaking Mifare DESFire MF3ICD40: Power Analysis and Templates in the Real World
inferred← citeshttps://doi.org/10.1007/978-3-642-23951-9_15openalex-snapshot
Information Theoretic and Security Analysis of a 65-Nanometer DDSLL AES S-Box
inferred← citeshttps://doi.org/10.1007/978-3-642-23951-9_16openalex-snapshot
Thwarting Higher-Order Side Channel Analysis with Additive and Multiplicative Maskings
inferred← citeshttps://doi.org/10.1007/978-3-642-23951-9_4openalex-snapshot
Improved Collision-Correlation Power Analysis on First Order Protected AES
inferred← citeshttps://doi.org/10.1007/978-3-642-24154-3_33openalex-snapshot
A Secure D Flip-Flop against Side Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-24209-0_1openalex-snapshot
Analysis of Nonparametric Estimation Methods for Mutual Information Analysis
inferred← citeshttps://doi.org/10.1007/978-3-642-24209-0_27openalex-snapshot
First Principal Components Analysis: A New Side Channel Distinguisher
inferred← citeshttps://doi.org/10.1007/978-3-642-24586-2_12openalex-snapshot
“Rank Correction”: A New Side-Channel Approach for Secret Key Recovery
inferred← citeshttps://doi.org/10.1007/978-3-642-25283-9_18openalex-snapshot
An Emerging Threat: Eve Meets a Robot
inferred← citeshttps://doi.org/10.1007/978-3-642-25516-8_20openalex-snapshot
Improved Precomputation Scheme for Scalar Multiplication on Elliptic Curves
inferred← citeshttps://doi.org/10.1007/978-3-642-25578-6_3openalex-snapshot
PKDPA: An Enhanced Probabilistic Differential Power Attack Methodology
inferred← citeshttps://doi.org/10.1007/978-3-642-27257-8_10openalex-snapshot
Implementation and Evaluation of an SCA-Resistant Embedded Processor
inferred← citeshttps://doi.org/10.1007/978-3-642-27257-8_15openalex-snapshot
An Exploration of the Kolmogorov-Smirnov Test as a Competitor to Mutual Information Analysis
inferred← citeshttps://doi.org/10.1007/978-3-642-27257-8_16openalex-snapshot
A High-Performance Implementation of Differential Power Analysis on Graphics Cards
inferred← citeshttps://doi.org/10.1007/978-3-642-27937-9_12openalex-snapshot
Credential Disabling from Trusted Execution Environments
inferred← citeshttps://doi.org/10.1007/978-3-642-27954-6_23openalex-snapshot
A New Difference Method for Side-Channel Analysis with High-Dimensional Leakage Models
inferred← citeshttps://doi.org/10.1007/978-3-642-29011-4_1openalex-snapshot
A Tutorial on High Performance Computing Applied to Cryptanalysis
inferred← citeshttps://doi.org/10.1007/978-3-642-29011-4_26openalex-snapshot
Statistical Tools Flavor Side-Channel Collision Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-29912-4_1openalex-snapshot
Exploiting the Difference of Side-Channel Leakages
inferred← citeshttps://doi.org/10.1007/978-3-642-29912-4_18openalex-snapshot
Intelligent Machine Homicide
inferred← citeshttps://doi.org/10.1007/978-3-642-29912-4_4openalex-snapshot
An Interleaved EPE-Immune PA-DPL Structure for Resisting Concentrated EM Side Channel Attacks on FPGA Implementation
inferred← citeshttps://doi.org/10.1007/978-3-642-29912-4_6openalex-snapshot
Conversion of Security Proofs from One Leakage Model to Another: A New Issue
inferred← citeshttps://doi.org/10.1007/978-3-642-30436-1_24openalex-snapshot
A Small Depth-16 Circuit for the AES S-Box
inferred← citeshttps://doi.org/10.1007/978-3-642-31912-9_12openalex-snapshot
Back Propagation Neural Network Based Leakage Characterization for Practical Security Analysis of Cryptographic Implementations
inferred← citeshttps://doi.org/10.1007/978-3-642-31912-9_5openalex-snapshot
An Efficient Leakage Characterization Method for Profiled Power Analysis Attacks
inferred← citeshttps://doi.org/10.1007/978-3-642-33027-8_12openalex-snapshot
Towards Super-Exponential Side-Channel Security with Efficient Leakage-Resilient PRFs
inferred← citeshttps://doi.org/10.1007/978-3-642-33027-8_2openalex-snapshot
Breakthrough Silicon Scanning Discovers Backdoor in Military Chip
inferred← citeshttps://doi.org/10.1007/978-3-642-33027-8_5openalex-snapshot
Threshold Implementations of All 3 ×3 and 4 ×4 S-Boxes
inferred← citeshttps://doi.org/10.1007/978-3-642-33027-8_6openalex-snapshot
How Far Should Theory Be from Practice?
inferred← citeshttps://doi.org/10.1007/978-3-642-33481-8_3openalex-snapshot
Complete Atomic Blocks for Elliptic Curves in Jacobian Coordinates over Prime Fields
inferred← citeshttps://doi.org/10.1007/978-3-642-34047-5_21openalex-snapshot
Higher-Order Masking Schemes for S-Boxes
inferred← citeshttps://doi.org/10.1007/978-3-642-34117-5_4openalex-snapshot
Very Short Critical Path Implementation of AES with Direct Logic Gates
inferred← citeshttps://doi.org/10.1007/978-3-642-34129-8_30openalex-snapshot
Comparison between Side-Channel Analysis Distinguishers
inferred← citeshttps://doi.org/10.1007/978-3-642-34416-9_1openalex-snapshot
A Novel Circuit Design Methodology to Reduce Side Channel Leakage
inferred← citeshttps://doi.org/10.1007/978-3-642-34931-7_8openalex-snapshot
Leakage Squeezing of Order Two
inferred← citeshttps://doi.org/10.1007/978-3-642-34961-4_44openalex-snapshot
Shuffling against Side-Channel Attacks: A Comprehensive Study with Cautionary Note
inferred← citeshttps://doi.org/10.1007/978-3-642-35404-5_22openalex-snapshot
Some Representations of the S-Box of Camellia in GF(((22)2)2)
inferred← citeshttps://doi.org/10.1007/978-3-642-35999-6_22openalex-snapshot
$\textnormal{\textsc{TWINE}}$: A Lightweight Block Cipher for Multiple Platforms
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