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A case study in computer-aided co-design of embedded controllers

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-56496-9_13openalex-snapshot
A verification strategy for timing constrained systems
inferredcites →https://doi.org/10.1016/b978-155860702-6/50048-xopenalex-snapshot
Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems
inferredcites →https://doi.org/10.1109/2.76286openalex-snapshot
Experiments with a program timing tool based on source-level timing schema
inferredcites →https://doi.org/10.1109/43.31537openalex-snapshot
Using statecharts for hardware description and synthesis
inferredcites →https://doi.org/10.1109/5.97297openalex-snapshot
The synchronous approach to reactive and real-time systems
inferredcites →https://doi.org/10.1109/5.97299openalex-snapshot
The ESTEREL language
inferredcites →https://doi.org/10.1109/dac.1992.227832openalex-snapshot
Synthesis and simulation of digital systems containing interacting hardware and software components
inferredcites →https://doi.org/10.1109/iccad.1991.185217openalex-snapshot
Rapid-prototyping of hardware and software in a unified framework
inferredcites →https://doi.org/10.1109/iccad.1992.279322openalex-snapshot
Synthesis of the hardware/software interface in microcontroller-based systems
inferredcites →https://doi.org/10.1109/iccd.1992.276282openalex-snapshot
Sequential circuit design using synthesis and optimization
inferredcites →https://doi.org/10.1145/321738.321743openalex-snapshot
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
inferredcites →https://doi.org/10.1177/072551368902200105openalex-snapshot
Narrativity And Interpretation: On Hermeneutical And Structuralist Approaches To Culture
inferredcites →https://doi.org/10.5555/304032.304158openalex-snapshot
Synthesis fo the hardware/software interface in microcontroller-based systems
inferredcites →https://doi.org/10.5555/800032.800668openalex-snapshot
Formal Design Verification of Digital Systems

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/0-387-32500-x_7openalex-snapshot
Hardware/Software co-design
inferred← citeshttps://doi.org/10.1007/978-0-387-35064-6_18openalex-snapshot
VHDL generation from SDL specifications
inferred← citeshttps://doi.org/10.1007/978-0-387-35064-6_3openalex-snapshot
Simplifying Data Operations for Formal Verification
inferred← citeshttps://doi.org/10.1007/978-1-4020-8052-4_11openalex-snapshot
Optimizations for Faster Execution of Esterel Programs
inferred← citeshttps://doi.org/10.1007/978-1-4419-7446-4_4openalex-snapshot
Performance Improvement by Customization
inferred← citeshttps://doi.org/10.1007/978-1-4757-2649-7_2openalex-snapshot
Hardware/Software Co-Synthesis Algorithms
inferred← citeshttps://doi.org/10.1007/978-3-540-30113-4_2openalex-snapshot
A Framework for Architectural Description of Embedded System
inferred← citeshttps://doi.org/10.1007/978-94-011-4698-2_12openalex-snapshot
Models and Methods for HW/SW Intellectual Property Interfacing
inferred← citeshttps://doi.org/10.1007/978-94-011-4698-2_6openalex-snapshot
Hardware/Software Co-Synthesis Algorithms
inferred← citeshttps://doi.org/10.1007/bfb0036081openalex-snapshot
Embedded system design and hybrid systems
inferred← citeshttps://doi.org/10.1016/b978-155860702-6/50005-3openalex-snapshot
Hardware/Software Co-Design Manuscript received February 1, 1996; revised December 2, 1996. This work was supported in part by DARPA, under Contract DABT 63-95-C-0049, and in part by NSF CAREER Award MIP 95-01615. Publisher Item Identifier S 0018-9219(97)02017-3
inferred← citeshttps://doi.org/10.1016/b978-155860702-6/50006-5openalex-snapshot
Codesign of Embedded Systems: Status and Trends
inferred← citeshttps://doi.org/10.1016/j.entcs.2006.02.027openalex-snapshot
Compiling Esterel into Static Discrete-Event Code
inferred← citeshttps://doi.org/10.1023/a:1008884219274openalex-snapshot
LYCOS: the Lyngby Co-Synthesis System
inferred← citeshttps://doi.org/10.1109/43.980257openalex-snapshot
An Esterel compiler for large control-dominated systems
inferred← citeshttps://doi.org/10.1109/5.558708openalex-snapshot
Hardware/software co-design
inferred← citeshttps://doi.org/10.1109/54.679207openalex-snapshot
Codesign of embedded systems: status and trends
inferred← citeshttps://doi.org/10.1109/dac.1997.597234openalex-snapshot
System-level Synthesis Of Low-power Hard Real-time Systems
inferred← citeshttps://doi.org/10.1109/dac.1999.781229openalex-snapshot
IPCHINOOK: an integrated IP-based design framework for distributed embedded systems
inferred← citeshttps://doi.org/10.1109/eurdac.1996.558240openalex-snapshot
Hardware/software partitioning of VHDL system specifications
inferred← citeshttps://doi.org/10.1109/hicss.1999.772879openalex-snapshot
Hardware/software codesign for FPGA-based systems
inferred← citeshttps://doi.org/10.1109/hsc.1998.666247openalex-snapshot
Hardware/software co-design of an ATM network interface card: a case study
inferred← citeshttps://doi.org/10.1109/iccad.1997.643382openalex-snapshot
Application-driven synthesis of core-based systems
inferred← citeshttps://doi.org/10.1109/iccad.1997.643585openalex-snapshot
Transformational partitioning for co-design of multiprocessor systems
inferred← citeshttps://doi.org/10.1109/iciss.1997.630275openalex-snapshot
System-level power evaluation metrics
inferred← citeshttps://doi.org/10.1109/isie.2007.4374808openalex-snapshot
Modeling I2C Communication Between SoCs with SystemC-AMS
inferred← citeshttps://doi.org/10.1109/issse.1998.738090openalex-snapshot
Hw/Sw codesign of an ATM network interface card starting from a system level specification
inferred← citeshttps://doi.org/10.1109/tcpmt.2013.2262151openalex-snapshot
Signal Integrity-Aware Virtual Prototyping of Field Bus-Based Embedded Systems
inferred← citeshttps://doi.org/10.1109/tcpmt.2016.2558288openalex-snapshot
High-Level Virtual Prototyping of Signal Integrity in Bus Communication
inferred← citeshttps://doi.org/10.1145/266021.266325openalex-snapshot
System-level synthesis of low-power hard real-time systems
inferred← citeshttps://doi.org/10.1145/288548.289119openalex-snapshot
Interface synthesis
inferred← citeshttps://doi.org/10.1145/301177.301514openalex-snapshot
Compiling Esterel into sequential code
inferred← citeshttps://doi.org/10.1145/309847.309865openalex-snapshot
ipChinook
inferred← citeshttps://doi.org/10.1145/337292.337429openalex-snapshot
Compiling Esterel into sequential code
inferred← citeshttps://doi.org/10.1155/2007/32903openalex-snapshot
Synchronous Paradigm in Embedded Systems
inferred← citeshttps://doi.org/10.1155/2007/52651openalex-snapshot
Code Generation in the Columbia Esterel Compiler
inferred← citeshttps://doi.org/10.1155/2008/134798openalex-snapshot
Modelling Field Bus Communications in Mixed-Signal Embedded Systems
inferred← citeshttps://doi.org/10.1155/2008/243890openalex-snapshot
C-Based Design of Heterogeneous Embedded Systems
inferred← citeshttps://doi.org/10.11606/d.55.2011.tde-31082011-124626openalex-snapshot
Co-Projeto de hardware/software para correlação de imagens
inferred← citeshttps://doi.org/10.1186/1687-3963-2007-052651openalex-snapshot
Code Generation in the Columbia Esterel Compiler
inferred← citeshttps://doi.org/10.3233/ica-1998-5104openalex-snapshot
Partitioning of Hardware-Software Embedded Systems: A Metrics-based Approach
inferred← citeshttps://doi.org/10.3390/s150923020openalex-snapshot
Optimization and Control of Cyber-Physical Vehicle Systems
inferred← citeshttps://doi.org/10.5555/252471.252544openalex-snapshot
Hardware/software partitioning of VHDL system specifications
inferred← citeshttps://doi.org/10.5555/266388.266438openalex-snapshot
Application-driven synthesis of core-based systems
inferred← citeshttps://doi.org/10.5555/266388.266542openalex-snapshot
Transformational partitioning for co-design of multiprocessor systems
inferred← citeshttps://doi.org/10.5555/823453.823835openalex-snapshot
Optimizations for faster execution of Esterel programs
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