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An introduction to compilation issues for parallel machines

https://doi.org/10.1007/bf00155803
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/spe.4380210604openalex-snapshot
An experiment with inline substitution
inferredcites →https://doi.org/10.1007/978-1-4613-1711-1openalex-snapshot
Data Organization in Parallel Computers
inferredcites →https://doi.org/10.1007/978-1-4613-2001-2openalex-snapshot
Memory Storage Patterns in Parallel Processing
inferredcites →https://doi.org/10.1007/978-1-4684-6894-6openalex-snapshot
Dependence Analysis for Supercomputing
inferredcites →https://doi.org/10.1007/978-1-4757-3472-0_2openalex-snapshot
Cooperating Sequential Processes
inferredcites →https://doi.org/10.1007/978-3-642-75771-6_10openalex-snapshot
SARA: A Cray Assembly Language Speedup Tool
inferredcites →https://doi.org/10.1007/bf00127949openalex-snapshot
Static scheduling for barrier MIMD architectures
inferredcites →https://doi.org/10.1007/bf00128175openalex-snapshot
Compiling programs for distributed-memory multiprocessors
inferredcites →https://doi.org/10.1007/bf00128178openalex-snapshot
Program parallelization with interprocedural analysis
inferredcites →https://doi.org/10.1007/bf01808954openalex-snapshot
The interprocedural analysis and automatic parallelization of Scheme programs
inferredcites →https://doi.org/10.1016/0141-9331(88)90099-3openalex-snapshot
Memory storage patterns in parallel processing
inferredcites →https://doi.org/10.1016/0141-9331(89)90038-0openalex-snapshot
High-performance computer architecture
inferredcites →https://doi.org/10.1016/0167-8191(87)90021-4openalex-snapshot
Architecture and performance of NEC supercomputer SX system
inferredcites →https://doi.org/10.1016/0167-8191(88)90002-6openalex-snapshot
SUPERB: A tool for semi-automatic MIMD/SIMD parallelization
inferredcites →https://doi.org/10.1016/0743-7315(88)90011-1openalex-snapshot
Analysis of interprocedural side effects in a parallel programming environment
inferredcites →https://doi.org/10.1016/0743-7315(90)90086-5openalex-snapshot
Data optimization: Allocation of arrays to reduce communication on SIMD machines
inferredcites →https://doi.org/10.1016/b978-0-444-88712-2.50012-3openalex-snapshot
Compiler Support for Machine-Independent Parallel Programming in Fortran D
inferredcites →https://doi.org/10.1016/c2009-0-10002-8openalex-snapshot
Languages, Compilers and Run-Time Environments for Distributed Memory Machines
inferredcites →https://doi.org/10.1038/scientificamerican0687-108openalex-snapshot
The Connection Machine
inferredcites →https://doi.org/10.1109/12.55693openalex-snapshot
Dynamic processor self-scheduling for general parallel nested loops
inferredcites →https://doi.org/10.1109/12.90251openalex-snapshot
Time optimal linear schedules for algorithms with uniform dependencies
inferredcites →https://doi.org/10.1109/2.76259openalex-snapshot
The evolution of instruction sequencing
inferredcites →https://doi.org/10.1109/5.214549openalex-snapshot
The ParaScope parallel programming environment
inferredcites →https://doi.org/10.1109/52.31649openalex-snapshot
Faust: an integrated environment for parallel programming
inferredcites →https://doi.org/10.1109/71.127259openalex-snapshot
Demonstration of automatic data partitioning techniques for parallelizing compilers on multicomputers
inferredcites →https://doi.org/10.1109/71.80123openalex-snapshot
Parallelizing programs with recursive data structures
inferredcites →https://doi.org/10.1109/71.86107openalex-snapshot
Compile-time partitioning of iterative parallel loops to reduce cache coherency traffic
inferredcites →https://doi.org/10.1109/71.86108openalex-snapshot
Interactive parallel programming using the ParaScope Editor
inferredcites →https://doi.org/10.1109/71.86110openalex-snapshot
An implementation of interprocedural bounded regular section analysis
inferredcites →https://doi.org/10.1109/71.86111openalex-snapshot
Compiling communication-efficient programs for massively parallel machines
inferredcites →https://doi.org/10.1109/71.97902openalex-snapshot
A loop transformation theory and an algorithm to maximize parallelism
inferredcites →https://doi.org/10.1109/c-m.1981.220595openalex-snapshot
An Approach to Scientific Array Processing: The Architectural Design of the AP-120B/FPS-164 Family
inferredcites →https://doi.org/10.1109/isca.1990.134511openalex-snapshot
Monsoon: an explicit token-store architecture
inferredcites →https://doi.org/10.1109/mc.1980.1653418openalex-snapshot
Data Flow Supercomputers
inferredcites →https://doi.org/10.1109/mc.1982.1653941openalex-snapshot
A Practical Data Flow Computer
inferredcites →https://doi.org/10.1109/proc.1966.5273openalex-snapshot
Very high-speed computing systems
inferredcites →https://doi.org/10.1109/proc.1972.8647openalex-snapshot
The Illiac IV system
inferredcites →https://doi.org/10.1109/superc.1988.44642openalex-snapshot
Vectorizing compilers: a test suite and results
inferredcites →https://doi.org/10.1109/tc.1982.1676014openalex-snapshot
The Burroughs Scientific Processor (BSP)
inferredcites →https://doi.org/10.1109/tc.1982.1676020openalex-snapshot
The Prime Memory System for Array Access
inferredcites →https://doi.org/10.1109/tc.1983.1676201openalex-snapshot
The NYU Ultracomputer—Designing an MIMD Shared Memory Parallel Computer
inferredcites →https://doi.org/10.1109/tc.1985.1676531openalex-snapshot
An Optimal Instruction-Scheduling Model for a Class of Vector Processors
inferredcites →https://doi.org/10.1109/tc.1987.1676939openalex-snapshot
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
inferredcites →https://doi.org/10.1109/tc.1987.5009495openalex-snapshot
Guided Self-Scheduling: A Practical Scheduling Scheme for Parallel Supercomputers
inferredcites →https://doi.org/10.1109/tc.1987.5009502openalex-snapshot
The Warp Computer: Architecture, Implementation, and Performance
inferredcites →https://doi.org/10.1126/science.253.5025.1233openalex-snapshot
Instruction-Level Parallel Processing
inferredcites →https://doi.org/10.1145/109025.109093openalex-snapshot
Combining hardware and software cache coherence strategies
inferredcites →https://doi.org/10.1145/113445.113458openalex-snapshot
Fortran at ten gigaflops
inferredcites →https://doi.org/10.1145/115372.115320openalex-snapshot
Efficiently computing static single assignment form and the control dependence graph
inferredcites →https://doi.org/10.1145/12276.13328openalex-snapshot
Interprocedural dependence analysis and parallelization
inferredcites →https://doi.org/10.1145/12276.13329openalex-snapshot
Direct parallelization of call statements
inferredcites →https://doi.org/10.1145/125826.126105openalex-snapshot
Vectorizing C compilers: how good are they?
inferredcites →https://doi.org/10.1145/139669.139715openalex-snapshot
T
inferredcites →https://doi.org/10.1145/143369.143408openalex-snapshot
Exploiting heterogeneous parallelism on a multithreaded multiprocessor
inferredcites →https://doi.org/10.1145/2166.357217openalex-snapshot
Postpass Code Optimization of Pipeline Constraints
inferredcites →https://doi.org/10.1145/2591635.2667157openalex-snapshot
Analysis of interprocedural side effects in a parallel programming environment
inferredcites →https://doi.org/10.1145/285930.285984openalex-snapshot
Using cache memory to reduce processor-memory traffic
inferredcites →https://doi.org/10.1145/285930.285999openalex-snapshot
Monsoon
inferredcites →https://doi.org/10.1145/29873.29875openalex-snapshot
Automatic translation of FORTRAN programs to vector form
inferredcites →https://doi.org/10.1145/3392717.3400034openalex-snapshot
Optimizing supercompilers for supercomputers
inferredcites →https://doi.org/10.1145/359327.359336openalex-snapshot
The CRAY-1 computer system
inferredcites →https://doi.org/10.1145/36204.36191openalex-snapshot
A study of scalar compilation techniques for pipelined supercomputers
inferredcites →https://doi.org/10.1145/502874.502879openalex-snapshot
A Fortran compiler for the FPS-164 scientific computer
inferredcites →https://doi.org/10.1145/53990.53993openalex-snapshot
Detecting conflicts between structure accesses
inferredcites →https://doi.org/10.1145/53990.54021openalex-snapshot
Optimal loop parallelization
inferredcites →https://doi.org/10.1145/59287.59291openalex-snapshot
Scheduling expressions on a pipelined processor with a maximal delay of one cycle
inferredcites →https://doi.org/10.1145/73141.74821openalex-snapshot
Dependence analysis for pointer variables
inferredcites →https://doi.org/10.1145/73141.74822openalex-snapshot
A technique for summarizing data access and its use in parallelism enhancing transformations
inferredcites →https://doi.org/10.1145/73141.74824openalex-snapshot
Process decomposition through locality of reference
inferredcites →https://doi.org/10.1145/73560.73561openalex-snapshot
Detecting equality of variables in programs
inferredcites →https://doi.org/10.1145/73560.73585openalex-snapshot
Lifetime analysis of dynamically allocated objects
inferredcites →https://doi.org/10.1145/76263.76337openalex-snapshot
More iteration space tiling
inferredcites →https://doi.org/10.1145/7902.7904openalex-snapshot
Advanced compiler optimizations for supercomputers
inferredcites →https://doi.org/10.1145/79505.79508openalex-snapshot
A study of scalar compilation techniques for pipelined supercomputers
inferredcites →https://doi.org/10.1145/800046.801647openalex-snapshot
Using cache memory to reduce processor-memory traffic
inferredcites →https://doi.org/10.1145/859526.859527openalex-snapshot
CEDAR
inferredcites →https://doi.org/10.1145/93542.93585openalex-snapshot
Analysis of pointers and structures
inferredcites →https://doi.org/10.1145/93542.93587openalex-snapshot
Compiling programs for a linear systolic array
inferredcites →https://doi.org/10.1145/960116.53993openalex-snapshot
Detecting conflicts between structure accesses
inferredcites →https://doi.org/10.1145/960116.54014openalex-snapshot
Compiling C for vectorization, parallelization, and inline expansion
inferredcites →https://doi.org/10.1145/960116.54021openalex-snapshot
Optimal loop parallelization
inferredcites →https://doi.org/10.1145/960116.54022openalex-snapshot
Software pipelining: an effective scheduling technique for VLIW machines
inferredcites →https://doi.org/10.1145/989393.989411openalex-snapshot
Interprocedural dependence analysis and parallelization
inferredcites →https://doi.org/10.1145/989393.989420openalex-snapshot
Software pipelining
inferredcites →https://doi.org/10.1145/989393.989429openalex-snapshot
Analysis of pointers and structures
inferredcites →https://doi.org/10.1145/99163.99183openalex-snapshot
Supporting shared data structures on distributed memory architectures
inferredcites →https://doi.org/10.1145/99164.99183openalex-snapshot
Supporting shared data structures on distributed memory architectures
inferredcites →https://doi.org/10.1147/rd.355.0743openalex-snapshot
Low-overhead scheduling of nested parallelism
inferredcites →https://doi.org/10.5555/62972.62987openalex-snapshot
Vectorizing compilers: a test suite and results

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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Automatic Analysis of Loops to Exploit Operator Parallelism on Reconfigurable Systems
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Superscalar RISC machines, straight-line programs, and graphics
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Perspective on measurements and modeling of Earth’s climate
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Automatic allocation of arrays to memories in FPGA processors with multiple memory banks
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Very long instruction word architectures for digital signal processing
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A study of pointer aliasing for software pipelining using run-time disambiguation
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HyperPascal for architecture independent parallel programming
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HyperPascal-an architecture independent Pascal interface for parallel programming
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Compiling for reconfigurable computing
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A study of pointer aliasing for software pipelining using run-time disambiguation
inferred← citeshttps://doi.org/10.1147/rd.404.0475openalex-snapshot
IC technology and ASIC design for the Cray J90 supercomputer
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A Survey of Loop Parallelization: Models, Approaches, and Recent Developments
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