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Mod-2-OBDDs—A data structure that generalizes EXOR-sum-of-products and ordered binary decision diagrams
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/3-540-55210-3_208openalex-snapshot
Synthesis for testability: Binary Decision Diagrams
inferredcites →https://doi.org/10.1007/3-540-56503-5_57openalex-snapshot
Frontiers of feasible and probabilistic feasible Boolean manipulation with branching programs
inferredcites →https://doi.org/10.1007/978-1-4615-3572-0openalex-snapshot
Field-Programmable Gate Arrays
inferredcites →https://doi.org/10.1007/978-3-322-94684-3openalex-snapshot
Verifikation digitaler Systeme
inferredcites →https://doi.org/10.1007/978-3-322-95233-2_2openalex-snapshot
Synthesis for Testability: Binary Decision Diagrams
inferredcites →https://doi.org/10.1007/bf00464357openalex-snapshot
Probabilistic verification of Boolean functions
inferredcites →https://doi.org/10.1007/bf01137685openalex-snapshot
Lower bounds on the size of bounded depth circuits over a complete basis with logical addition
inferredcites →https://doi.org/10.1007/bfb0017563openalex-snapshot
Modified Branching Programs and Their Computational Power
inferredcites →https://doi.org/10.1007/bfb0023716openalex-snapshot
Verifying temporal properties of sequential machines without building their state diagrams
inferredcites →https://doi.org/10.1016/s0020-0190(80)90078-2openalex-snapshot
Equivalence of free boolean graphs can be decided probabilistically in polynomial time
inferredcites →https://doi.org/10.1017/cbo9781139172769openalex-snapshot
Introduction to Finite Fields and their Applications
inferredcites →https://doi.org/10.1090/dimacs/003/07openalex-snapshot
Verifying temporal properties of sequential machines without building their state diagrams
inferredcites →https://doi.org/10.1109/12.324545openalex-snapshot
Efficient Boolean manipulation with OBDD's can be extended to FBDD's
inferredcites →https://doi.org/10.1109/12.45212openalex-snapshot
On the complexity of mod-2l sum PLA's
inferredcites →https://doi.org/10.1109/12.45214openalex-snapshot
Fault tolerance in linear systolic arrays using time redundancy
inferredcites →https://doi.org/10.1109/12.73590openalex-snapshot
On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication
inferredcites →https://doi.org/10.1109/edac.1992.205890openalex-snapshot
Multilevel logic synthesis based on functional decision diagrams
inferredcites →https://doi.org/10.1109/edac.1992.205904openalex-snapshot
Logic synthesis for arithmetic circuits using the Reed-Muller representation
inferredcites →https://doi.org/10.1109/iccad.1988.122451openalex-snapshot
Logic verification using binary decision diagrams in a logic synthesis environment
inferredcites →https://doi.org/10.1109/iccd.1992.276211openalex-snapshot
Fast minimization of mixed-polarity AND/XOR canonical networks
inferredcites →https://doi.org/10.1109/irepgelc.1954.6499441openalex-snapshot
Application of Boolean algebra to switching circuit design and to error detection
inferredcites →https://doi.org/10.1109/ismvl.1992.186830openalex-snapshot
Optimization of multiple-valued AND-EXOR expressions using multiple-place decision diagrams
inferredcites →https://doi.org/10.1109/t-c.1972.223475openalex-snapshot
Easily Testable Realizations ror Logic Functions
inferredcites →https://doi.org/10.1109/tc.1986.1676819openalex-snapshot
Graph-Based Algorithms for Boolean Function Manipulation
inferredcites →https://doi.org/10.1109/tit.1954.1057465openalex-snapshot
A class of multiple-error-correcting codes and the decoding scheme
inferredcites →https://doi.org/10.1145/12130.12134openalex-snapshot
Two lower bounds for branching programs
inferredcites →https://doi.org/10.1145/123186.123223openalex-snapshot
Sequential circuit verification using symbolic model checking
inferredcites →https://doi.org/10.1145/123186.123225openalex-snapshot
Shared binary decision diagram with attributed edges for efficient Boolean function manipulation
inferredcites →https://doi.org/10.1145/136035.136043openalex-snapshot
Symbolic Boolean manipulation with ordered binary-decision diagrams
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/(sici)1098-2418(200005)16:3<233::aid-rsa1>3.0.co;2-qopenalex-snapshot
On random orderings of variables for parity ordered binary decision diagrams
inferred← citeshttps://doi.org/10.1006/inco.2000.3022openalex-snapshot
On the Descriptive and Algorithmic Power of Parity Ordered Binary Decision Diagrams
inferred← citeshttps://doi.org/10.1006/jcss.2001.1818openalex-snapshot
Lower Bounds for Linearly Transformed OBDDs and FBDDs
inferred← citeshttps://doi.org/10.1007/3-540-44612-5_43openalex-snapshot
Algebraic and Uniqueness Properties of Parity Ordered Binary Decision Diagrams and Their Generalization
inferred← citeshttps://doi.org/10.1007/3-540-44683-4_19openalex-snapshot
Graph-Driven Free Parity BDDs: Algorithms and Lower Bounds
inferred← citeshttps://doi.org/10.1007/3-540-45506-x_6openalex-snapshot
Data Structures for Boolean Functions BDDs — Foundations and Applications
inferred← citeshttps://doi.org/10.1007/3-540-46691-6_29openalex-snapshot
Lower Bounds for Linear Transformed OBDDs and FBDDs
inferred← citeshttps://doi.org/10.1007/978-1-4615-0817-5_11openalex-snapshot
Ordered Binary Decision Diagrams
inferred← citeshttps://doi.org/10.1007/978-1-4757-6048-4_49openalex-snapshot
Communication Complexity and BDD Lower Bound Techniques
inferred← citeshttps://doi.org/10.1007/978-3-540-45138-9_23openalex-snapshot
Lower Bounds for General Graph–Driven Read–Once Parity Branching Programs
inferred← citeshttps://doi.org/10.1007/bfb0023460openalex-snapshot
On the descriptive and algorithmic power of parity ordered binary decision diagrams
inferred← citeshttps://doi.org/10.1007/bfb0028564openalex-snapshot
Equivalence test and ordering transformation for parity-OBDDs of different variable ordering
inferred← citeshttps://doi.org/10.1007/s00037-016-0141-zopenalex-snapshot
Deterministic Identity Testing for Sum of Read-Once Oblivious Arithmetic Branching Programs
inferred← citeshttps://doi.org/10.1007/s00224-001-1011-9openalex-snapshot
The Satisfiability Problem for Probabilistic Ordered Branching Programs
inferred← citeshttps://doi.org/10.1007/s100090100056openalex-snapshot
Binary decision diagrams in theory and practice
inferred← citeshttps://doi.org/10.1016/j.tcs.2006.01.052openalex-snapshot
Lower bounds for restricted read-once parity branching programs
inferred← citeshttps://doi.org/10.1016/s0020-0190(98)00113-6openalex-snapshot
Parity OBDDs cannot be handled efficiently enough
inferred← citeshttps://doi.org/10.1016/s0020-0190(99)00027-7openalex-snapshot
Linear codes are hard for oblivious read-once parity branching programs
inferred← citeshttps://doi.org/10.1016/s1571-0661(05)80601-2openalex-snapshot
Probabilistic Symbolic Simulation and Verification with ⊕-OBDDs
inferred← citeshttps://doi.org/10.1051/ita:1999108openalex-snapshot
On the Complexity of the Hidden Weighted Bit Function for Various BDD Models
inferred← citeshttps://doi.org/10.1051/ita:2002011openalex-snapshot
Characterizing the Complexity of Boolean Functions represented by Well-Structured Graph-Driven Parity-FBDDs
inferred← citeshttps://doi.org/10.1109/43.703943openalex-snapshot
The complexity of the inclusion operation on OFDD's
inferred← citeshttps://doi.org/10.1109/ismvl.2000.848625openalex-snapshot
Mod-p decision diagrams: a data structure for multiple-valued functions
inferred← citeshttps://doi.org/10.1109/jetcas.2014.2361058openalex-snapshot
Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form
inferred← citeshttps://doi.org/10.4236/iim.2010.22012openalex-snapshot
Probabilistic Verification over GF(2m) Using Mod2-OBDDs
inferred← citeshttps://doi.org/10.53846/goediss-2524openalex-snapshot
On Lower Bounds for Parity Branching Programs
inferred← citeshttps://doi.org/10.53846/goediss-2588openalex-snapshot
Obere und untere Schranken für eingeschränkte Parity-Branchingprogramme
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